{"id":"https://openalex.org/W7165145302","doi":"https://doi.org/10.1145/3787109.3815238","title":"CERT: A Curved Escape Routing Framework for High-Speed Differential Pairs in Dense BGA Packages","display_name":"CERT: A Curved Escape Routing Framework for High-Speed Differential Pairs in Dense BGA Packages","publication_year":2026,"publication_date":"2026-06-18","ids":{"openalex":"https://openalex.org/W7165145302","doi":"https://doi.org/10.1145/3787109.3815238"},"language":null,"primary_location":{"id":"doi:10.1145/3787109.3815238","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815238","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3787109.3815238","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012890852","display_name":"Weiqing Ji","orcid":"https://orcid.org/0009-0009-0328-4241"},"institutions":[{"id":"https://openalex.org/I92403157","display_name":"University of Science and Technology Beijing","ror":"https://ror.org/02egmk993","country_code":"CN","type":"education","lineage":["https://openalex.org/I92403157"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiqing Ji","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0009-0328-4241","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China","institution_ids":["https://openalex.org/I92403157"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138864593","display_name":"Boxuan Xu","orcid":"https://orcid.org/0009-0002-3740-7077"},"institutions":[{"id":"https://openalex.org/I92403157","display_name":"University of Science and Technology Beijing","ror":"https://ror.org/02egmk993","country_code":"CN","type":"education","lineage":["https://openalex.org/I92403157"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Boxuan Xu","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0002-3740-7077","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China","institution_ids":["https://openalex.org/I92403157"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109667924","display_name":"Hongli Dai","orcid":null},"institutions":[{"id":"https://openalex.org/I92403157","display_name":"University of Science and Technology Beijing","ror":"https://ror.org/02egmk993","country_code":"CN","type":"education","lineage":["https://openalex.org/I92403157"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongli Dai","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0009-7823-6658","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China","institution_ids":["https://openalex.org/I92403157"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5138881389","display_name":"Chaojie Liu","orcid":"https://orcid.org/0009-0000-3240-3080"},"institutions":[{"id":"https://openalex.org/I92403157","display_name":"University of Science and Technology Beijing","ror":"https://ror.org/02egmk993","country_code":"CN","type":"education","lineage":["https://openalex.org/I92403157"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chaojie Liu","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China"],"raw_orcid":"https://orcid.org/0009-0000-3240-3080","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China","institution_ids":["https://openalex.org/I92403157"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080354226","display_name":"Mingyang Kou","orcid":"https://orcid.org/0000-0002-9562-1365"},"institutions":[{"id":"https://openalex.org/I92403157","display_name":"University of Science and Technology Beijing","ror":"https://ror.org/02egmk993","country_code":"CN","type":"education","lineage":["https://openalex.org/I92403157"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Mingyang Kou","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-9562-1365","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China","institution_ids":["https://openalex.org/I92403157"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058812423","display_name":"Hailong Yao","orcid":"https://orcid.org/0000-0002-8750-3086"},"institutions":[{"id":"https://openalex.org/I37796252","display_name":"Beijing University of Technology","ror":"https://ror.org/037b1pp87","country_code":"CN","type":"education","lineage":["https://openalex.org/I37796252"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hailong Yao","raw_affiliation_strings":["University of Science and Technology Beijing, Beijing, China and Key Laboratory of Advanced Materials and Devices for Post-Moore Chips, Ministry of Education, Beijing, China"],"raw_orcid":"https://orcid.org/0000-0002-8750-3086","affiliations":[{"raw_affiliation_string":"University of Science and Technology Beijing, Beijing, China and Key Laboratory of Advanced Materials and Devices for Post-Moore Chips, Ministry of Education, Beijing, China","institution_ids":["https://openalex.org/I37796252"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.74248347,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"461","last_page":"466"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9764000177383423,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9764000177383423,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.007899999618530273,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.005400000140070915,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.7278000116348267},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.5394999980926514},{"id":"https://openalex.org/keywords/ball-grid-array","display_name":"Ball grid array","score":0.46540001034736633},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.46230000257492065},{"id":"https://openalex.org/keywords/tangent","display_name":"Tangent","score":0.42899999022483826},{"id":"https://openalex.org/keywords/equal-cost-multi-path-routing","display_name":"Equal-cost multi-path routing","score":0.40290001034736633},{"id":"https://openalex.org/keywords/routing-table","display_name":"Routing table","score":0.37689998745918274},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3707999885082245}],"concepts":[{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7278000116348267},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5422000288963318},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.5394999980926514},{"id":"https://openalex.org/C94709252","wikidata":"https://www.wikidata.org/wiki/Q570628","display_name":"Ball grid array","level":3,"score":0.46540001034736633},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.46230000257492065},{"id":"https://openalex.org/C138187205","wikidata":"https://www.wikidata.org/wiki/Q131251","display_name":"Tangent","level":2,"score":0.42899999022483826},{"id":"https://openalex.org/C115443555","wikidata":"https://www.wikidata.org/wiki/Q5367790","display_name":"Equal-cost multi-path routing","level":5,"score":0.40290001034736633},{"id":"https://openalex.org/C184896649","wikidata":"https://www.wikidata.org/wiki/Q290066","display_name":"Routing table","level":4,"score":0.37689998745918274},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3707999885082245},{"id":"https://openalex.org/C2777042112","wikidata":"https://www.wikidata.org/wiki/Q5281658","display_name":"Discontinuity (linguistics)","level":2,"score":0.3172000050544739},{"id":"https://openalex.org/C76522221","wikidata":"https://www.wikidata.org/wiki/Q5035396","display_name":"Multipath routing","level":5,"score":0.31679999828338623},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3093999922275543},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.28209999203681946},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.2816999852657318},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.2799000144004822},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.27869999408721924},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.2700999975204468},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.26570001244544983},{"id":"https://openalex.org/C2984173633","wikidata":"https://www.wikidata.org/wiki/Q22725","display_name":"Routing algorithm","level":4,"score":0.26460000872612}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3787109.3815238","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815238","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3787109.3815238","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815238","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth","score":0.6588454842567444}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2029051066","https://openalex.org/W2997962048","https://openalex.org/W3094271339","https://openalex.org/W3126985692","https://openalex.org/W3212770172","https://openalex.org/W4239809259","https://openalex.org/W4392667087","https://openalex.org/W4413287017","https://openalex.org/W4417403459"],"related_works":[],"abstract_inverted_index":{"With":[0],"the":[1,14,65,101,112,127,139,146],"rapid":[2],"advancement":[3],"of":[4,17,104,115,126,141],"5G":[5],"communication,":[6],"AI":[7],"accelerators,":[8],"and":[9,30,110],"high-performance":[10],"computing":[11],"(HPC)":[12],"systems,":[13],"data":[15],"rate":[16],"BGA":[18,45,86],"differential":[19,82,108,154],"signals":[20,155],"has":[21],"surpassed":[22],"56Gbps.":[23],"Traditional":[24],"45\u00b0":[25],"routing":[26,50,78,119,125,151],"causes":[27],"impedance":[28],"discontinuity":[29],"EMI":[31],"issues,":[32,67],"while":[33],"also":[34],"triggering":[35],"design":[36],"rule":[37],"violations":[38],"(DRVs)":[39],"with":[40,93,156],"route-keepout":[41,157],"areas":[42],"in":[43,84,130],"dense":[44,85],"packages.":[46,87],"In":[47],"contrast,":[48],"curved":[49,76,105,149],"can":[51],"provide":[52],"superior":[53],"signal":[54],"integrity":[55],"(SI),":[56],"but":[57],"relies":[58],"on":[59],"labor-intensive":[60],"manual":[61,136],"design.":[62],"To":[63,138],"address":[64],"above":[66],"this":[68,144],"paper":[69],"proposes":[70],"CERT,":[71],"a":[72],"novel":[73],"smooth":[74],"(tangent-continuous)":[75],"escape":[77,118,150],"framework":[79],"for":[80,107,135,153],"high-speed":[81],"pairs":[83,109],"A":[88],"tailored":[89],"hexagonal":[90],"graph":[91],"model":[92],"polyline-to-arc":[94],"conversion":[95],"rules":[96],"is":[97,145],"proposed,":[98],"which":[99],"guarantees":[100],"tangent":[102],"continuity":[103],"wires":[106],"enables":[111],"direct":[113],"reuse":[114],"traditional":[116],"polyline":[117],"algorithms.":[120],"Experiments":[121],"show":[122],"CERT":[123],"completes":[124],"industrial":[128],"benchmark":[129],"2s":[131],"(vs.":[132],"1":[133],"week":[134],"routing).":[137],"best":[140],"our":[142],"knowledge,":[143],"first":[147],"automatic":[148],"work":[152],"area":[158],"adaptability.":[159]},"counts_by_year":[],"updated_date":"2026-06-19T15:51:49.773706","created_date":"2026-06-19T00:00:00"}
