{"id":"https://openalex.org/W7165167027","doi":"https://doi.org/10.1145/3787109.3815218","title":"ATSGRU: Attention-Sparse Gated Recurrent Unit for Computationally Efficient Wideband Digital Predistortion of Quadrature Digital Power Amplifiers","display_name":"ATSGRU: Attention-Sparse Gated Recurrent Unit for Computationally Efficient Wideband Digital Predistortion of Quadrature Digital Power Amplifiers","publication_year":2026,"publication_date":"2026-06-18","ids":{"openalex":"https://openalex.org/W7165167027","doi":"https://doi.org/10.1145/3787109.3815218"},"language":null,"primary_location":{"id":"doi:10.1145/3787109.3815218","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815218","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3787109.3815218","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100759137","display_name":"Jiayu Yang","orcid":"https://orcid.org/0009-0003-9391-8653"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiayu Yang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0003-9391-8653","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101198145","display_name":"Wending Zhao","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wending Zhao","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0009-1732-6801","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125134527","display_name":"Z Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zijian Huang","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0002-8166-0969","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013984542","display_name":"Yinyin Lin","orcid":"https://orcid.org/0000-0002-5939-3502"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yinyin Lin","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, School of Microelectronics, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-5939-3502","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, School of Microelectronics, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037491264","display_name":"Yun Yin","orcid":"https://orcid.org/0000-0002-3911-8079"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yun Yin","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0002-3911-8079","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030822792","display_name":"Hongtao Xu","orcid":"https://orcid.org/0000-0003-1852-4112"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongtao Xu","raw_affiliation_strings":["State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0003-1852-4112","affiliations":[{"raw_affiliation_string":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"495","last_page":"501"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11248","display_name":"Advanced Power Amplifier Design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11873","display_name":"PAPR reduction in OFDM","score":0.0010999999940395355,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0008999999845400453,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/predistortion","display_name":"Predistortion","score":0.8891000151634216},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6518999934196472},{"id":"https://openalex.org/keywords/wideband","display_name":"Wideband","score":0.5842999815940857},{"id":"https://openalex.org/keywords/linearization","display_name":"Linearization","score":0.5185999870300293},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4691999852657318},{"id":"https://openalex.org/keywords/w-cdma","display_name":"W-CDMA","score":0.43309998512268066},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.3873000144958496},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.3691999912261963}],"concepts":[{"id":"https://openalex.org/C2778587875","wikidata":"https://www.wikidata.org/wiki/Q7239686","display_name":"Predistortion","level":4,"score":0.8891000151634216},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7301999926567078},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6812999844551086},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6518999934196472},{"id":"https://openalex.org/C2780202535","wikidata":"https://www.wikidata.org/wiki/Q4524457","display_name":"Wideband","level":2,"score":0.5842999815940857},{"id":"https://openalex.org/C11210021","wikidata":"https://www.wikidata.org/wiki/Q1520713","display_name":"Linearization","level":3,"score":0.5185999870300293},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4691999852657318},{"id":"https://openalex.org/C120620775","wikidata":"https://www.wikidata.org/wiki/Q79686","display_name":"W-CDMA","level":3,"score":0.43309998512268066},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.3873000144958496},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.3691999912261963},{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.3095000088214874},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.30160000920295715},{"id":"https://openalex.org/C2775946640","wikidata":"https://www.wikidata.org/wiki/Q1735017","display_name":"Cascode","level":4,"score":0.2930999994277954},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.29260000586509705},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.2847999930381775},{"id":"https://openalex.org/C62869609","wikidata":"https://www.wikidata.org/wiki/Q28137","display_name":"Quadrature (astronomy)","level":2,"score":0.2777000069618225},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.2728999853134155},{"id":"https://openalex.org/C2776191232","wikidata":"https://www.wikidata.org/wiki/Q4683143","display_name":"Adjacent channel power ratio","level":5,"score":0.26840001344680786},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.26260000467300415},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.2612000107765198},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.25119999051094055}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3787109.3815218","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815218","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3787109.3815218","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3787109.3815218","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2026","raw_type":"proceedings-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.40815868973731995}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2161181093","https://openalex.org/W2274213189","https://openalex.org/W2890250854","https://openalex.org/W2929383960","https://openalex.org/W3004577860","https://openalex.org/W3014121089","https://openalex.org/W3120759960","https://openalex.org/W3128855577","https://openalex.org/W3162281459","https://openalex.org/W4226211208","https://openalex.org/W4285195139","https://openalex.org/W4312987736","https://openalex.org/W4386596879","https://openalex.org/W4389665457","https://openalex.org/W4391341593","https://openalex.org/W4408183367","https://openalex.org/W4408183377","https://openalex.org/W4408183600","https://openalex.org/W4410583145","https://openalex.org/W4411713515","https://openalex.org/W4411799367","https://openalex.org/W7083439869"],"related_works":[],"abstract_inverted_index":{"Digital":[0],"predistortion":[1],"(DPD)":[2],"is":[3,31,100],"a":[4,103,120],"widely":[5],"used":[6],"technique":[7],"for":[8,60,150],"enhancing":[9],"signal":[10],"quality":[11],"in":[12,44,65],"modern":[13],"radio":[14],"frequency":[15],"(RF)":[16],"power":[17],"amplifiers":[18],"(PAs).":[19],"However,":[20],"the":[21,73,78,90,113,129],"strong":[22,148],"performance":[23],"of":[24,81],"deep":[25],"neural":[26,57],"network":[27],"(DNN)-based":[28],"DPD":[29,64,132,155],"models":[30],"often":[32],"offset":[33],"by":[34,138],"their":[35,41],"prohibitive":[36],"computational":[37,95],"complexity,":[38],"which":[39],"limits":[40],"practical":[42],"deployment":[43],"wideband":[45,63,154],"systems.":[46],"This":[47],"paper":[48],"presents":[49],"an":[50],"attention-sparse":[51],"gated":[52],"recurrent":[53],"unit":[54],"(ATSGRU)\u2014a":[55],"novel":[56],"architecture":[58],"designed":[59],"computationally":[61],"efficient":[62,151],"quadrature":[66],"digital":[67],"PAs":[68],"(DPAs).":[69],"The":[70,97],"ATSGRU":[71,115],"integrates":[72],"attention":[74],"mechanism":[75],"that":[76,112],"evaluates":[77],"temporal":[79],"relevance":[80],"input":[82],"features":[83],"and":[84,93,125,152],"prunes":[85],"redundant":[86],"components,":[87],"thereby":[88],"simplifying":[89],"model":[91],"structure":[92],"reducing":[94,134],"load.":[96],"proposed":[98,114],"method":[99],"validated":[101],"on":[102],"custom":[104],"28-nm":[105],"CMOS":[106],"DPA":[107],"chip.":[108],"Experimental":[109],"results":[110,145],"demonstrate":[111],"achieves":[116],"superior":[117],"linearization":[118],"with":[119,128],"favorable":[121],"balance":[122],"between":[123],"accuracy":[124],"complexity":[126],"compared":[127],"state-of-the-art":[130],"(SOTA)":[131],"model,":[133],"multiply-accumulate":[135],"(MAC)":[136],"operations":[137],"54%":[139],"while":[140],"maintaining":[141],"comparable":[142],"performance.":[143],"These":[144],"highlight":[146],"its":[147],"potential":[149],"scalable":[153],"applications.":[156]},"counts_by_year":[],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2026-06-19T00:00:00"}
