{"id":"https://openalex.org/W7155386332","doi":"https://doi.org/10.1145/3777884.3797819","title":"Cross-Platform, Cross-Framework Development of Hybrid-Parallel Matrix-Multiplication codes","display_name":"Cross-Platform, Cross-Framework Development of Hybrid-Parallel Matrix-Multiplication codes","publication_year":2026,"publication_date":"2026-04-23","ids":{"openalex":"https://openalex.org/W7155386332","doi":"https://doi.org/10.1145/3777884.3797819"},"language":null,"primary_location":{"id":"doi:10.1145/3777884.3797819","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3777884.3797819","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th ACM/SPEC International Conference on Performance Engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3777884.3797819","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5134394717","display_name":"Vyuhita Bonthu","orcid":"https://orcid.org/0009-0005-6371-2210"},"institutions":[{"id":"https://openalex.org/I4210152718","display_name":"Indian Institute of Technology Dharwad","ror":"https://ror.org/0509djg30","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210152718"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Vyuhita Bonthu","raw_affiliation_strings":["Indian Institute of Technology Dharwad, Dharwad, Karnataka, India"],"raw_orcid":"https://orcid.org/0009-0005-6371-2210","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Dharwad, Dharwad, Karnataka, India","institution_ids":["https://openalex.org/I4210152718"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031419424","display_name":"Nikhil Hegde","orcid":null},"institutions":[{"id":"https://openalex.org/I4210152718","display_name":"Indian Institute of Technology Dharwad","ror":"https://ror.org/0509djg30","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210152718"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nikhil Hegde","raw_affiliation_strings":["Indian Institute of Technology Dharwad, Dharwad, Karnataka, India"],"raw_orcid":"https://orcid.org/0009-0004-7600-5665","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Dharwad, Dharwad, Karnataka, India","institution_ids":["https://openalex.org/I4210152718"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5134394717"],"corresponding_institution_ids":["https://openalex.org/I4210152718"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.96555094,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"17","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8269000053405762,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.8269000053405762,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.04259999841451645,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.033900000154972076,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/x86","display_name":"x86","score":0.7860000133514404},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.6341000199317932},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5372999906539917},{"id":"https://openalex.org/keywords/development","display_name":"Development (topology)","score":0.5242000222206116},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.5013999938964844},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.40119999647140503},{"id":"https://openalex.org/keywords/ranging","display_name":"Ranging","score":0.3824000060558319}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7915999889373779},{"id":"https://openalex.org/C170723468","wikidata":"https://www.wikidata.org/wiki/Q182933","display_name":"x86","level":3,"score":0.7860000133514404},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.6341000199317932},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5372999906539917},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5367000102996826},{"id":"https://openalex.org/C2776542497","wikidata":"https://www.wikidata.org/wiki/Q5266672","display_name":"Development (topology)","level":2,"score":0.5242000222206116},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.5013999938964844},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.40119999647140503},{"id":"https://openalex.org/C115051666","wikidata":"https://www.wikidata.org/wiki/Q6522493","display_name":"Ranging","level":2,"score":0.3824000060558319},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3440999984741211},{"id":"https://openalex.org/C2778119891","wikidata":"https://www.wikidata.org/wiki/Q477690","display_name":"CUDA","level":2,"score":0.32440000772476196},{"id":"https://openalex.org/C95203288","wikidata":"https://www.wikidata.org/wiki/Q221682","display_name":"Semaphore","level":2,"score":0.31690001487731934},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.2948000133037567},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.29030001163482666},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.27790001034736633},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.25540000200271606},{"id":"https://openalex.org/C43126263","wikidata":"https://www.wikidata.org/wiki/Q128751","display_name":"Source code","level":2,"score":0.25270000100135803}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3777884.3797819","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3777884.3797819","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th ACM/SPEC International Conference on Performance Engineering","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3777884.3797819","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3777884.3797819","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 17th ACM/SPEC International Conference on Performance Engineering","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1977661221","https://openalex.org/W2004916460","https://openalex.org/W2029566311","https://openalex.org/W2055312318","https://openalex.org/W2056999868","https://openalex.org/W2084379367","https://openalex.org/W2565436413","https://openalex.org/W2969580338","https://openalex.org/W2987931114","https://openalex.org/W4256275602","https://openalex.org/W4281707342","https://openalex.org/W4399449628","https://openalex.org/W4407217868"],"related_works":[],"abstract_inverted_index":{"Matrix-multiplication":[0],"is":[1],"an":[2],"important":[3],"kernel":[4],"in":[5],"domains":[6],"ranging":[7],"from":[8],"machine":[9],"learning":[10],"to":[11,20,70],"high-performance":[12],"computing.":[13],"Developers":[14],"devote":[15],"significant":[16],"time":[17],"and":[18,39,51,60,88],"effort":[19],"optimizing":[21],"the":[22,30],"matrix-multiplication":[23,34,77],"kernel.":[24],"In":[25],"this":[26],"paper,":[27],"we":[28,66],"simplify":[29],"development":[31],"of":[32,76],"optimized":[33],"codes":[35,44],"for":[36,45],"various":[37],"platforms":[38],"heterogeneous":[40],"systems.":[41],"We":[42],"target":[43],"CPUs":[46],"on":[47],"x86":[48],"(AVX,":[49],"AVX2)":[50],"ARM":[52],"(Neon)":[53],"platforms,":[54],"as":[55,57],"well":[56],"Nvidia":[58],"GPUs":[59],"Jetson":[61],"Nano.":[62],"To":[63],"achieve":[64],"this,":[65],"employ":[67],"a":[68,72,82],"tool":[69],"generate":[71],"novel,":[73],"hybrid-parallel,":[74],"implementation":[75],"that":[78],"exploits":[79],"parallelism":[80],"within":[81],"core,":[83],"across":[84,86,89],"cores,":[85],"nodes,":[87],"GPU":[90],"devices.":[91]},"counts_by_year":[],"updated_date":"2026-04-24T06:07:52.864757","created_date":"2026-04-24T00:00:00"}