{"id":"https://openalex.org/W4416191434","doi":"https://doi.org/10.1145/3774888","title":"ChatArch: A Knowledge-driven Graph-of-thought LLM Framework for Processor Architecture Optimization","display_name":"ChatArch: A Knowledge-driven Graph-of-thought LLM Framework for Processor Architecture Optimization","publication_year":2025,"publication_date":"2025-11-13","ids":{"openalex":"https://openalex.org/W4416191434","doi":"https://doi.org/10.1145/3774888"},"language":"en","primary_location":{"id":"doi:10.1145/3774888","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3774888","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002221185","display_name":"Zheng Wu","orcid":"https://orcid.org/0009-0009-9726-104X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zheng Wu","raw_affiliation_strings":["Fudan University","Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0009-9726-104X","affiliations":[{"raw_affiliation_string":"Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103443828","display_name":"Zidan Yang","orcid":"https://orcid.org/0009-0001-7660-587X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuochu Yang","raw_affiliation_strings":["Fudan University","Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0001-7660-587X","affiliations":[{"raw_affiliation_string":"Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100459963","display_name":"Zhuoyuan Yang","orcid":"https://orcid.org/0009-0007-7328-957X"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuoyuan Yang","raw_affiliation_strings":["Fudan University","Fudan University, Shanghai China"],"raw_orcid":"https://orcid.org/0009-0007-7328-957X","affiliations":[{"raw_affiliation_string":"Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Fudan University, Shanghai China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112921770","display_name":"Zihao Chen","orcid":"https://orcid.org/0009-0004-5372-3525"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zihao Chen","raw_affiliation_strings":["Fudan University","Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0009-0004-5372-3525","affiliations":[{"raw_affiliation_string":"Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004722925","display_name":"Li Shang","orcid":"https://orcid.org/0000-0003-3944-7531"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Shang","raw_affiliation_strings":["Computer Science, Fudan University","Computer Science, Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0003-3944-7531","affiliations":[{"raw_affiliation_string":"Computer Science, Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Computer Science, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5045464812","display_name":"Fan Yang","orcid":"https://orcid.org/0000-0003-2164-8175"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Yang","raw_affiliation_strings":["Fudan University","Fudan University, Shanghai, China"],"raw_orcid":"https://orcid.org/0000-0003-2164-8175","affiliations":[{"raw_affiliation_string":"Fudan University","institution_ids":["https://openalex.org/I24943067"]},{"raw_affiliation_string":"Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":1.377,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.84195497,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":"31","issue":"2","first_page":"1","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.5573999881744385,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.5573999881744385,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.24719999730587006,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14347","display_name":"Big Data and Digital Economy","score":0.04129999876022339,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.8264999985694885},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6018000245094299},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5335999727249146},{"id":"https://openalex.org/keywords/processor-design","display_name":"Processor design","score":0.45820000767707825},{"id":"https://openalex.org/keywords/reference-architecture","display_name":"Reference architecture","score":0.3935000002384186},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.35179999470710754},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.350600004196167},{"id":"https://openalex.org/keywords/design-methods","display_name":"Design methods","score":0.33809998631477356}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8689000010490417},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.8264999985694885},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.737500011920929},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6018000245094299},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5335999727249146},{"id":"https://openalex.org/C526435321","wikidata":"https://www.wikidata.org/wiki/Q1303814","display_name":"Processor design","level":2,"score":0.45820000767707825},{"id":"https://openalex.org/C55356503","wikidata":"https://www.wikidata.org/wiki/Q2136675","display_name":"Reference architecture","level":4,"score":0.3935000002384186},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3871999979019165},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.35179999470710754},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.350600004196167},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3456000089645386},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.33809998631477356},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.3343999981880188},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.31209999322891235},{"id":"https://openalex.org/C2780801425","wikidata":"https://www.wikidata.org/wiki/Q5164392","display_name":"Construct (python library)","level":2,"score":0.289900004863739},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.2854999899864197},{"id":"https://openalex.org/C154240960","wikidata":"https://www.wikidata.org/wiki/Q2860294","display_name":"Database-centric architecture","level":5,"score":0.2842000126838684},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.28189998865127563},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.2808000147342682},{"id":"https://openalex.org/C106246047","wikidata":"https://www.wikidata.org/wiki/Q4928435","display_name":"Iterative design","level":3,"score":0.2806999981403351},{"id":"https://openalex.org/C37139622","wikidata":"https://www.wikidata.org/wiki/Q386953","display_name":"Cellular architecture","level":5,"score":0.2606000006198883},{"id":"https://openalex.org/C98025372","wikidata":"https://www.wikidata.org/wiki/Q477538","display_name":"Systems architecture","level":3,"score":0.25870001316070557},{"id":"https://openalex.org/C55627697","wikidata":"https://www.wikidata.org/wiki/Q7572175","display_name":"Space-based architecture","level":5,"score":0.25609999895095825},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.25029999017715454}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3774888","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3774888","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3495785756","display_name":null,"funder_award_id":"92373207","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W60686164","https://openalex.org/W1986491730","https://openalex.org/W2034062945","https://openalex.org/W2138351227","https://openalex.org/W2154001575","https://openalex.org/W2170382128","https://openalex.org/W3099700870","https://openalex.org/W3156789018","https://openalex.org/W4200520905","https://openalex.org/W4384519236","https://openalex.org/W4387835442","https://openalex.org/W4393160302","https://openalex.org/W4404101387"],"related_works":[],"abstract_inverted_index":{"Processors":[0],"serve":[1],"as":[2],"the":[3,16,33,80,134,182],"cornerstone":[4],"of":[5,149,178,184],"modern":[6],"computing":[7],"systems.":[8],"Although":[9],"processor":[10,50,70,75,81,117,168],"design":[11,18,59,83,107,118],"encompasses":[12],"multiple":[13],"VLSI":[14],"levels,":[15],"architectural":[17],"plays":[19],"a":[20,64,114,122,174],"critical":[21],"role":[22],"in":[23,49],"determining":[24],"performance,":[25],"power":[26],"consumption,":[27],"and":[28,56,85,94,105,200],"area":[29],"efficiency.":[30],"To":[31,53],"address":[32],"growing":[34],"pressure":[35],"to":[36,92,128,139,195],"shorten":[37],"chip":[38],"time-to-market,":[39],"there":[40],"is":[41,126],"an":[42,87],"increasing":[43],"demand":[44],"for":[45,69],"rapid":[46],"iteration":[47],"methods":[48],"architecture":[51,58,71,76,82],"development.":[52],"achieve":[54],"efficient":[55,130],"effortless":[57],"optimization,":[60],"we":[61,78,112],"develop":[62],"ChatArch,":[63],"knowledge-driven":[65,123],"graph-of-thought":[66,90],"multi-LLM-agent":[67],"framework":[68,91,125],"optimization.":[72,132],"Based":[73],"on":[74],"expertise,":[77],"decompose":[79],"space":[84],"construct":[86],"LLM":[88],"agent":[89],"characterize":[93],"iteratively":[95],"optimize":[96],"these":[97],"subspaces.":[98],"Also,":[99],"by":[100,110],"systematically":[101],"consolidating":[102],"domain-specific":[103],"knowledge":[104,119],"empirical":[106],"principles":[108],"validated":[109],"experts,":[111],"establish":[113],"comprehensive":[115],"RISC-V":[116],"repository.":[120],"Moreover,":[121],"multi-agent":[124],"developed":[127],"enable":[129],"microarchitecture":[131,136],"Finally,":[133],"optimized":[135],"modules":[137],"aggregate":[138],"form":[140],"system-level":[141],"designs.":[142],"This":[143],"methodology":[144],"achieves":[145],"automated":[146],"iterative":[147],"optimization":[148,208],"microarchitectures":[150],"targeting":[151],"PPA":[152,199],"objectives":[153],"while":[154],"generating":[155],"corresponding":[156],"behavioral":[157,167],"models.":[158],"The":[159],"experiments":[160],"demonstrate":[161],"that":[162],"our":[163],"method":[164],"effectively":[165],"designs":[166],"models,":[169],"with":[170,205],"LLM-generated":[171],"architectures":[172],"achieving":[173],"validation":[175],"success":[176],"rate":[177],"over":[179],"97.39%,":[180],"surpassing":[181],"performance":[183],"other":[185],"LLMs,":[186],"including":[187],"GPT-4o.":[188],"ChatArch":[189],"consistently":[190],"meets":[191],"requirements,":[192],"delivering":[193],"up":[194],"9.97%":[196],"times":[197],"better":[198],"32\u201368x":[201],"efficiency":[202],"gains":[203],"compared":[204],"traditional":[206],"black-box":[207],"methods.":[209]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-11-13T00:00:00"}
