{"id":"https://openalex.org/W7106138412","doi":"https://doi.org/10.1145/3773656.3773670","title":"Guaranteed DGEMM Accuracy While Using Reduced Precision Tensor Cores Through Extensions of the Ozaki Scheme","display_name":"Guaranteed DGEMM Accuracy While Using Reduced Precision Tensor Cores Through Extensions of the Ozaki Scheme","publication_year":2026,"publication_date":"2026-01-09","ids":{"openalex":"https://openalex.org/W7106138412","doi":"https://doi.org/10.1145/3773656.3773670"},"language":null,"primary_location":{"id":"doi:10.1145/3773656.3773670","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3773656.3773670","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Supercomputing Asia and International Conference on High Performance Computing in Asia Pacific Region","raw_type":"proceedings-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3773656.3773670","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Angelika Schwarz","orcid":"https://orcid.org/0000-0002-8444-6303"},"institutions":[{"id":"https://openalex.org/I1304085615","display_name":"Nvidia (United Kingdom)","ror":"https://ror.org/02kr42612","country_code":"GB","type":"company","lineage":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"]},{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["GB","US"],"is_corresponding":true,"raw_author_name":"Angelika Schwarz","raw_affiliation_strings":["NVIDIA Corporation, Stockholm, Sweden"],"raw_orcid":"https://orcid.org/0000-0002-8444-6303","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Stockholm, Sweden","institution_ids":["https://openalex.org/I4210127875","https://openalex.org/I1304085615"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Anton Anders","orcid":"https://orcid.org/0009-0007-6491-090X"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anton Anders","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, USA"],"raw_orcid":"https://orcid.org/0009-0007-6491-090X","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Cole Brower","orcid":"https://orcid.org/0009-0007-6520-8717"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cole Brower","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, USA"],"raw_orcid":"https://orcid.org/0009-0007-6520-8717","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Harun Bayraktar","orcid":"https://orcid.org/0009-0009-8971-1899"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Harun Bayraktar","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, USA"],"raw_orcid":"https://orcid.org/0009-0009-8971-1899","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"John Gunnels","orcid":"https://orcid.org/0000-0001-5110-190X"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Gunnels","raw_affiliation_strings":["NVIDIA Corporation, New York, USA"],"raw_orcid":"https://orcid.org/0000-0001-5110-190X","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, New York, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Kate Clark","orcid":"https://orcid.org/0000-0001-5211-2002"},"institutions":[{"id":"https://openalex.org/I1304085615","display_name":"Nvidia (United Kingdom)","ror":"https://ror.org/02kr42612","country_code":"GB","type":"company","lineage":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Kate Clark","raw_affiliation_strings":["NVIDIA Corporation, Cambridge, United Kingdom"],"raw_orcid":"https://orcid.org/0000-0001-5211-2002","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Cambridge, United Kingdom","institution_ids":["https://openalex.org/I1304085615"]}]},{"author_position":"middle","author":{"id":null,"display_name":"RuQing G. Xu","orcid":"https://orcid.org/0000-0002-5782-716X"},"institutions":[{"id":"https://openalex.org/I1304085615","display_name":"Nvidia (United Kingdom)","ror":"https://ror.org/02kr42612","country_code":"GB","type":"company","lineage":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"]},{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"RuQing G. Xu","raw_affiliation_strings":["NVIDIA Corporation, Minato, Japan"],"raw_orcid":"https://orcid.org/0000-0002-5782-716X","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Minato, Japan","institution_ids":["https://openalex.org/I4210127875","https://openalex.org/I1304085615"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Samuel Rodriguez","orcid":"https://orcid.org/0000-0002-2406-6499"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Samuel Rodriguez","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, USA"],"raw_orcid":"https://orcid.org/0000-0002-2406-6499","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Sebastien Cayrols","orcid":"https://orcid.org/0000-0003-3740-8985"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sebastien Cayrols","raw_affiliation_strings":["NVIDIA Corporation, Knoxville, USA"],"raw_orcid":"https://orcid.org/0000-0003-3740-8985","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Knoxville, USA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Pawel Tabaszewski","orcid":"https://orcid.org/0009-0005-5559-0444"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Pawel Tabaszewski","raw_affiliation_strings":["NVIDIA Corporation, Warsaw, Poland"],"raw_orcid":"https://orcid.org/0009-0005-5559-0444","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Warsaw, Poland","institution_ids":[]}]},{"author_position":"last","author":{"id":null,"display_name":"Victor Podlozhnyuk","orcid":"https://orcid.org/0009-0002-1417-547X"},"institutions":[{"id":"https://openalex.org/I1304085615","display_name":"Nvidia (United Kingdom)","ror":"https://ror.org/02kr42612","country_code":"GB","type":"company","lineage":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Victor Podlozhnyuk","raw_affiliation_strings":["NVIDIA Corporation, Reading, United Kingdom"],"raw_orcid":"https://orcid.org/0009-0002-1417-547X","affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Reading, United Kingdom","institution_ids":["https://openalex.org/I1304085615"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":11,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I1304085615","https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":78.7059,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.99028158,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"91","last_page":"101"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.4839000105857849,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.4839000105857849,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.21040000021457672,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.08100000023841858,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.5728999972343445},{"id":"https://openalex.org/keywords/estimator","display_name":"Estimator","score":0.5063999891281128},{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.4645000100135803},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.4603999853134155},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4043000042438507},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.3686999976634979},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.3587999939918518},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.349700003862381},{"id":"https://openalex.org/keywords/tensor","display_name":"Tensor (intrinsic definition)","score":0.34369999170303345}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.698199987411499},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.5728999972343445},{"id":"https://openalex.org/C185429906","wikidata":"https://www.wikidata.org/wiki/Q1130160","display_name":"Estimator","level":2,"score":0.5063999891281128},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.504800021648407},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.4645000100135803},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.4603999853134155},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4043000042438507},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.3686999976634979},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36730000376701355},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.3587999939918518},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.349700003862381},{"id":"https://openalex.org/C155281189","wikidata":"https://www.wikidata.org/wiki/Q3518150","display_name":"Tensor (intrinsic definition)","level":2,"score":0.34369999170303345},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.3301999866962433},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.32910001277923584},{"id":"https://openalex.org/C2986737658","wikidata":"https://www.wikidata.org/wiki/Q30103009","display_name":"Tensor decomposition","level":3,"score":0.3095000088214874},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3068999946117401},{"id":"https://openalex.org/C42355184","wikidata":"https://www.wikidata.org/wiki/Q1361088","display_name":"Matrix decomposition","level":3,"score":0.30469998717308044},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.2976999878883362},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.2858000099658966},{"id":"https://openalex.org/C2776190703","wikidata":"https://www.wikidata.org/wiki/Q488148","display_name":"Slicing","level":2,"score":0.28380000591278076},{"id":"https://openalex.org/C2776459999","wikidata":"https://www.wikidata.org/wiki/Q2119376","display_name":"Fidelity","level":2,"score":0.28110000491142273},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.27900001406669617},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.2775000035762787},{"id":"https://openalex.org/C106487976","wikidata":"https://www.wikidata.org/wiki/Q685816","display_name":"Matrix (chemical analysis)","level":2,"score":0.27469998598098755},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.2732999920845032},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.26930001378059387},{"id":"https://openalex.org/C2780365336","wikidata":"https://www.wikidata.org/wiki/Q25047934","display_name":"Single-core","level":2,"score":0.2624000012874603},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.25189998745918274}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3773656.3773670","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3773656.3773670","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Supercomputing Asia and International Conference on High Performance Computing in Asia Pacific Region","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:2511.13778","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2511.13778","pdf_url":"https://arxiv.org/pdf/2511.13778","source":{"id":"https://openalex.org/S4393918464","display_name":"ArXiv.org","issn_l":"2331-8422","issn":["2331-8422"],"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"doi:10.1145/3773656.3773670","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3773656.3773670","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Supercomputing Asia and International Conference on High Performance Computing in Asia Pacific Region","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"The":[0],"rapid":[1],"growth":[2],"of":[3,23,46],"artificial":[4],"intelligence":[5],"(AI)":[6],"has":[7,41],"made":[8],"low-precision":[9,50,214],"formats":[10],"such":[11,58],"as":[12,59,218],"FP16,":[13],"FP8,":[14],"and,":[15],"most":[16],"recently,":[17],"block-scaled":[18],"FP4":[19],"the":[20,89,100,202],"primary":[21],"focus":[22],"modern":[24],"GPUs,":[25],"where":[26],"Tensor":[27],"Cores":[28],"now":[29],"deliver":[30],"orders-of-magnitude":[31],"higher":[32],"throughput":[33],"than":[34,172],"traditional":[35],"FP64":[36,78,164,195],"pipelines.":[37],"This":[38],"hardware":[39],"shift":[40],"sparked":[42],"a":[43,71,94,178,219],"new":[44],"line":[45],"algorithm":[47],"research:":[48],"using":[49],"units":[51],"to":[52,106,123,186],"emulate":[53],"double-precision":[54],"accuracy":[55],"through":[56],"schemes":[57],"Ozaki":[60],"decompositions.":[61],"We":[62],"advance":[63],"this":[64],"direction":[65],"with":[66,140],"Automatic":[67],"Dynamic":[68],"Precision":[69],"(ADP),":[70],"fully":[72],"GPU-resident":[73],"framework":[74],"that":[75,97,213],"makes":[76],"emulated":[77],"matrix":[79],"multiplication":[80],"both":[81],"efficient":[82],"and":[83,120,150,189,201,225],"reliable.":[84],"At":[85],"its":[86],"core":[87],"is":[88],"Exponent":[90],"Span":[91],"Capacity":[92],"(ESC),":[93],"hardware-agnostic":[95],"estimator":[96],"conservatively":[98],"determines":[99],"decomposition":[101],"parameter":[102],"(a.k.a.,":[103],"slices)":[104],"required":[105],"achieve":[107],"FP64-level":[108],"accuracy.":[109],"Built":[110],"on":[111,166,197],"ESC,":[112],"ADP":[113,161],"integrates":[114],"exception":[115],"handling,":[116],"run":[117,174],"time":[118,175],"heuristics,":[119],"seamless":[121],"fallback":[122],"native":[124,194],"FP64,":[125],"ensuring":[126],"correctness":[127],"without":[128],"host\u2013device":[129],"synchronization":[130],"or":[131],"user":[132],"intervention.":[133],"Additionally,":[134],"we":[135],"further":[136],"improve":[137],"Ozaki-style":[138],"decompositions":[139],"an":[141],"unsigned":[142],"integer":[143],"slicing":[144],"scheme,":[145],"which":[146],"increases":[147],"representational":[148],"efficiency":[149],"reduces":[151],"computational":[152],"waste.":[153],"Validated":[154],"against":[155],"recently":[156],"proposed":[157],"BLAS":[158],"grading":[159],"tests,":[160],"consistently":[162],"preserves":[163],"fidelity":[165],"challenging":[167],"inputs":[168],"while":[169],"incurring":[170],"less":[171],"10%":[173],"overhead.":[176],"In":[177],"55-bit":[179],"mantissa":[180],"setting,":[181],"our":[182],"approach":[183],"achieves":[184],"up":[185],"2.3":[187],"\u00d7":[188,191],"13.2":[190],"speedups":[192],"over":[193],"GEMM":[196],"NVIDIA":[198],"Blackwell":[199,206],"GB200":[200],"RTX":[203],"Pro":[204],"6000":[205],"Server":[207],"Edition,":[208],"respectively.":[209],"Our":[210],"results":[211],"demonstrate":[212],"accelerators":[215],"can":[216],"serve":[217],"practical,":[220],"production-ready":[221],"foundation":[222],"for":[223],"high-fidelity":[224],"high-performance":[226],"scientific":[227],"computing":[228],"workloads.":[229]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-11-20T00:00:00"}
