{"id":"https://openalex.org/W7141158033","doi":"https://doi.org/10.1145/3764386.3787955","title":"Invited: Analog IC Design Automation -- More than a Technical Challenge","display_name":"Invited: Analog IC Design Automation -- More than a Technical Challenge","publication_year":2026,"publication_date":"2026-03-15","ids":{"openalex":"https://openalex.org/W7141158033","doi":"https://doi.org/10.1145/3764386.3787955"},"language":"en","primary_location":{"id":"doi:10.1145/3764386.3787955","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3787955","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3764386.3787955","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026535134","display_name":"Benjamin Prautsch","orcid":"https://orcid.org/0000-0002-1051-6209"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Benjamin Prautsch","raw_affiliation_strings":["Fraunhofer IIS, Dresden, SN, Germany"],"raw_orcid":"https://orcid.org/0000-0002-1051-6209","affiliations":[{"raw_affiliation_string":"Fraunhofer IIS, Dresden, SN, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081411528","display_name":"Uwe Eichler","orcid":"https://orcid.org/0000-0003-2869-8570"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Uwe Eichler","raw_affiliation_strings":["Fraunhofer IIS, Dresden, SN, Germany"],"raw_orcid":"https://orcid.org/0000-0003-2869-8570","affiliations":[{"raw_affiliation_string":"Fraunhofer IIS, Dresden, SN, Germany","institution_ids":["https://openalex.org/I4210095661"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210095661"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.2453714,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"216","last_page":"217"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.25119999051094055,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.25119999051094055,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.181099995970726,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.07329999655485153,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.4677000045776367},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.41830000281333923},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.37139999866485596},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3529999852180481},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.3515999913215637},{"id":"https://openalex.org/keywords/interchangeability","display_name":"Interchangeability","score":0.3188999891281128}],"concepts":[{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.4677000045776367},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4650999903678894},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4196000099182129},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.41830000281333923},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.373199999332428},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.37139999866485596},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3529999852180481},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.3515999913215637},{"id":"https://openalex.org/C2779606619","wikidata":"https://www.wikidata.org/wiki/Q17092524","display_name":"Interchangeability","level":2,"score":0.3188999891281128},{"id":"https://openalex.org/C117671659","wikidata":"https://www.wikidata.org/wiki/Q11049265","display_name":"Manufacturing engineering","level":1,"score":0.28690001368522644},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.2574999928474426},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.25450000166893005},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.25119999051094055}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3764386.3787955","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3787955","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"},{"id":"pmh:oai:publica.fraunhofer.de:publica/513120","is_oa":true,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/513120","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":{"id":"doi:10.1145/3764386.3787955","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3787955","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2156152281","https://openalex.org/W3130071551","https://openalex.org/W4285292434","https://openalex.org/W4321373405"],"related_works":[],"abstract_inverted_index":{"216":[0]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2026-03-28T00:00:00"}
