{"id":"https://openalex.org/W7141065429","doi":"https://doi.org/10.1145/3764386.3779578","title":"A New Approach to Performance-Driven Analog IC Placement","display_name":"A New Approach to Performance-Driven Analog IC Placement","publication_year":2026,"publication_date":"2026-03-15","ids":{"openalex":"https://openalex.org/W7141065429","doi":"https://doi.org/10.1145/3764386.3779578"},"language":null,"primary_location":{"id":"doi:10.1145/3764386.3779578","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3779578","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3764386.3779578","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045033480","display_name":"Donghao Fang","orcid":"https://orcid.org/0000-0002-8529-0398"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Donghao Fang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A&amp;#38;M University, College Station, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-8529-0398","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&amp;#38;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Hailiang Hu","orcid":"https://orcid.org/0000-0002-4906-3788"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hailiang Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A&amp;#38;M University, College Station, TX, USA"],"raw_orcid":"https://orcid.org/0000-0002-4906-3788","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A&amp;#38;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034982668","display_name":"Wuxi Li","orcid":"https://orcid.org/0000-0002-9887-5109"},"institutions":[{"id":"https://openalex.org/I65376102","display_name":"PDF Solutions (United States)","ror":"https://ror.org/007737841","country_code":"US","type":"company","lineage":["https://openalex.org/I65376102"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wuxi Li","raw_affiliation_strings":["AMD, Inc., San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-9887-5109","affiliations":[{"raw_affiliation_string":"AMD, Inc., San Jose, CA, USA","institution_ids":["https://openalex.org/I65376102"]}]},{"author_position":"last","author":{"id":null,"display_name":"Jiang Hu","orcid":"https://orcid.org/0000-0003-1157-7799"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiang Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering and               Department of Computer Science and Engineering, Texas A&amp;#38;M University, College Station, TX, USA"],"raw_orcid":"https://orcid.org/0000-0003-1157-7799","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and               Department of Computer Science and Engineering, Texas A&amp;#38;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5045033480"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.67623566,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"92","last_page":"100"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.4593999981880188,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.4593999981880188,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.050200000405311584,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.03790000081062317,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.35100001096725464},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.305400013923645},{"id":"https://openalex.org/keywords/interchangeability","display_name":"Interchangeability","score":0.2662999927997589},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.2492000013589859}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.536899983882904},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.35100001096725464},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.305400013923645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30250000953674316},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2808000147342682},{"id":"https://openalex.org/C2779606619","wikidata":"https://www.wikidata.org/wiki/Q17092524","display_name":"Interchangeability","level":2,"score":0.2662999927997589},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25699999928474426},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2551000118255615},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.25189998745918274},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.2492000013589859}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3764386.3779578","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3779578","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3764386.3779578","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3764386.3779578","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 International Symposium on Physical Design","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1996190198","https://openalex.org/W2074346254","https://openalex.org/W2100322482","https://openalex.org/W2100740271","https://openalex.org/W2141019759","https://openalex.org/W2295598076","https://openalex.org/W2346205343","https://openalex.org/W2604893700","https://openalex.org/W2963799213","https://openalex.org/W3036821469","https://openalex.org/W3092618035","https://openalex.org/W3108107800","https://openalex.org/W3111306693","https://openalex.org/W3113090643","https://openalex.org/W3211815845","https://openalex.org/W4242786083","https://openalex.org/W4249900664","https://openalex.org/W4280555049","https://openalex.org/W4311415873","https://openalex.org/W4323240828","https://openalex.org/W4404133732","https://openalex.org/W4408151497"],"related_works":[],"abstract_inverted_index":{"A":[0],"major":[1],"obstacle":[2],"in":[3,61,91],"analog":[4,34,119,128],"design":[5],"automation":[6],"is":[7,11,23],"that":[8,73,108],"circuit":[9,103],"performance":[10,114],"sensitive":[12],"to":[13,54],"layout,":[14],"yet":[15],"accurately":[16],"capturing":[17],"this":[18,28],"impact":[19],"within":[20],"layout":[21,120],"tools":[22],"very":[24],"expensive.":[25],"To":[26],"address":[27],"challenge,":[29],"we":[30],"propose":[31],"a":[32,47,64,123],"performance-driven":[33,127],"IC":[35],"placement":[36,59,129],"approach,":[37],"called":[38],"VPlace,":[39],"guided":[40],"by":[41],"machine":[42,66,97,125],"learning.":[43],"Our":[44],"approach":[45],"leverages":[46],"novel":[48],"application":[49],"of":[50,82,96],"the":[51,58,80,84,94,101],"VQ-VAE":[52],"technique":[53],"improve":[55],"robustness":[56],"during":[57],"stage,":[60],"conjunction":[62],"with":[63],"recent":[65],"learning-based":[67],"macromodeling":[68],"method.":[69],"We":[70],"further":[71],"demonstrate":[72],"data":[74],"preparation":[75],"strategies,":[76],"which":[77],"directly":[78],"affect":[79],"efficiency":[81],"investigating":[83],"solution":[85],"space,":[86],"play":[87],"an":[88,117],"important":[89],"role":[90],"determining":[92],"both":[93],"accuracy":[95],"learning":[98],"models":[99],"and":[100,112,122],"resulting":[102],"performance.":[104],"Experimental":[105],"results":[106],"show":[107],"VPlace":[109],"achieves":[110],"22%-26%":[111],"10%-16%":[113],"improvements":[115],"over":[116],"open-source":[118],"tool":[121],"prior":[124],"learning\u2013based":[126],"technique,":[130],"respectively.":[131]},"counts_by_year":[],"updated_date":"2026-03-29T06:01:01.467347","created_date":"2026-03-28T00:00:00"}
