{"id":"https://openalex.org/W4412891132","doi":"https://doi.org/10.1145/3758321","title":"Robust LFSR-based Scrambling to Mitigate Stencil Attack on Main Memory","display_name":"Robust LFSR-based Scrambling to Mitigate Stencil Attack on Main Memory","publication_year":2025,"publication_date":"2025-08-04","ids":{"openalex":"https://openalex.org/W4412891132","doi":"https://doi.org/10.1145/3758321"},"language":"en","primary_location":{"id":"doi:10.1145/3758321","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3758321","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://doi.org/10.1145/3758321","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004076132","display_name":"Gaurav Kumar","orcid":"https://orcid.org/0000-0002-2357-6382"},"institutions":[{"id":"https://openalex.org/I4210127441","display_name":"Indian Institute of Technology Jammu","ror":"https://ror.org/02f0vsw63","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210127441"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gaurav Kumar","raw_affiliation_strings":["Electrical Engineering, Indian Institute of Technology Jammu","Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India"],"raw_orcid":"https://orcid.org/0000-0002-2357-6382","affiliations":[{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu","institution_ids":["https://openalex.org/I4210127441"]},{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India","institution_ids":["https://openalex.org/I4210127441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5119182305","display_name":"Kushal Pravin Nanote","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127441","display_name":"Indian Institute of Technology Jammu","ror":"https://ror.org/02f0vsw63","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210127441"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Kushal Pravin Nanote","raw_affiliation_strings":["Electrical Engineering, Indian Institute of Technology Jammu","Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India"],"raw_orcid":"https://orcid.org/0009-0001-0855-7204","affiliations":[{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu","institution_ids":["https://openalex.org/I4210127441"]},{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India","institution_ids":["https://openalex.org/I4210127441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083072467","display_name":"Sohan Lal","orcid":"https://orcid.org/0000-0002-2325-1705"},"institutions":[{"id":"https://openalex.org/I159176309","display_name":"Universit\u00e4t Hamburg","ror":"https://ror.org/00g30e956","country_code":"DE","type":"education","lineage":["https://openalex.org/I159176309"]},{"id":"https://openalex.org/I4210131745","display_name":"Parallel Consulting (United States)","ror":"https://ror.org/03cssbw37","country_code":"US","type":"company","lineage":["https://openalex.org/I4210131745"]},{"id":"https://openalex.org/I884043246","display_name":"Hamburg University of Technology","ror":"https://ror.org/04bs1pb34","country_code":"DE","type":"education","lineage":["https://openalex.org/I884043246"]}],"countries":["DE","US"],"is_corresponding":false,"raw_author_name":"Sohan Lal","raw_affiliation_strings":["Massively Parallel Systems Group, Hamburg University of Technology","Massively Parallel Systems Group, Hamburg University of Technology, Hamburg, Germany"],"raw_orcid":"https://orcid.org/0000-0002-2325-1705","affiliations":[{"raw_affiliation_string":"Massively Parallel Systems Group, Hamburg University of Technology","institution_ids":["https://openalex.org/I4210131745","https://openalex.org/I159176309"]},{"raw_affiliation_string":"Massively Parallel Systems Group, Hamburg University of Technology, Hamburg, Germany","institution_ids":["https://openalex.org/I159176309","https://openalex.org/I884043246"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060469822","display_name":"Yamuna Prasad","orcid":"https://orcid.org/0000-0002-3709-7956"},"institutions":[{"id":"https://openalex.org/I4210127441","display_name":"Indian Institute of Technology Jammu","ror":"https://ror.org/02f0vsw63","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210127441"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Yamuna Prasad","raw_affiliation_strings":["Computer Science and Engineering, Indian Institute of Technology Jammu","Computer Science and Engineering, Indian Institute of Technology Jammu, Jammu, India"],"raw_orcid":"https://orcid.org/0000-0002-3709-7956","affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, Indian Institute of Technology Jammu","institution_ids":["https://openalex.org/I4210127441"]},{"raw_affiliation_string":"Computer Science and Engineering, Indian Institute of Technology Jammu, Jammu, India","institution_ids":["https://openalex.org/I4210127441"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078604240","display_name":"Satyadev Ahlawat","orcid":"https://orcid.org/0000-0003-0186-1446"},"institutions":[{"id":"https://openalex.org/I4210127441","display_name":"Indian Institute of Technology Jammu","ror":"https://ror.org/02f0vsw63","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210127441"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Satyadev Ahlawat","raw_affiliation_strings":["Electrical Engineering, Indian Institute of Technology Jammu","Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India"],"raw_orcid":"https://orcid.org/0000-0003-0186-1446","affiliations":[{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu","institution_ids":["https://openalex.org/I4210127441"]},{"raw_affiliation_string":"Electrical Engineering, Indian Institute of Technology Jammu, Jammu, India","institution_ids":["https://openalex.org/I4210127441"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.7588,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.87809144,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":95,"max":98},"biblio":{"volume":"24","issue":"5s","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scrambling","display_name":"Scrambling","score":0.9461569786071777},{"id":"https://openalex.org/keywords/linear-feedback-shift-register","display_name":"Linear feedback shift register","score":0.8351901173591614},{"id":"https://openalex.org/keywords/stencil","display_name":"Stencil","score":0.7290416955947876},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5750979781150818},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4807467460632324},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.45193469524383545},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.31988632678985596},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1972390115261078},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.17346447706222534},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.11683085560798645},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.10101267695426941}],"concepts":[{"id":"https://openalex.org/C182548165","wikidata":"https://www.wikidata.org/wiki/Q2261483","display_name":"Scrambling","level":2,"score":0.9461569786071777},{"id":"https://openalex.org/C159862308","wikidata":"https://www.wikidata.org/wiki/Q681101","display_name":"Linear feedback shift register","level":4,"score":0.8351901173591614},{"id":"https://openalex.org/C76752949","wikidata":"https://www.wikidata.org/wiki/Q7607499","display_name":"Stencil","level":2,"score":0.7290416955947876},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5750979781150818},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4807467460632324},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.45193469524383545},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.31988632678985596},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1972390115261078},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.17346447706222534},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.11683085560798645},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.10101267695426941},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3758321","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3758321","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1145/3758321","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3758321","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by-nc","license_id":"https://openalex.org/licenses/cc-by-nc","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1522930108","https://openalex.org/W1553586369","https://openalex.org/W1985514943","https://openalex.org/W1995875735","https://openalex.org/W1997933199","https://openalex.org/W2036887984","https://openalex.org/W2078483536","https://openalex.org/W2142431959","https://openalex.org/W2146950091","https://openalex.org/W2175377689","https://openalex.org/W2318019974","https://openalex.org/W2562125700","https://openalex.org/W2576037784","https://openalex.org/W2613314374","https://openalex.org/W2750192944","https://openalex.org/W2775542369","https://openalex.org/W2798351951","https://openalex.org/W2896947236","https://openalex.org/W2900091459","https://openalex.org/W2962726564","https://openalex.org/W2984882580","https://openalex.org/W3015685940","https://openalex.org/W3025188264","https://openalex.org/W3043791176","https://openalex.org/W3114050501","https://openalex.org/W3139139957","https://openalex.org/W3170969852","https://openalex.org/W3206878967","https://openalex.org/W4245276998","https://openalex.org/W4308016342","https://openalex.org/W4316813742","https://openalex.org/W4375934760","https://openalex.org/W4379116140","https://openalex.org/W4380677167","https://openalex.org/W4385270008","https://openalex.org/W4392595463","https://openalex.org/W4406874965","https://openalex.org/W4410068165"],"related_works":["https://openalex.org/W2039378765","https://openalex.org/W2003798513","https://openalex.org/W2151764765","https://openalex.org/W2890431355","https://openalex.org/W4376875029","https://openalex.org/W3149084271","https://openalex.org/W4247008888","https://openalex.org/W2150319905","https://openalex.org/W2962978274","https://openalex.org/W4298291099"],"abstract_inverted_index":{"Main":[0],"memory":[1,32,58,71,126,160,237],"plays":[2],"a":[3,13,61,85,107,116],"pivotal":[4],"role":[5],"in":[6,12,239],"the":[7,91,96,102,122,169,189,195,209,218,229,232],"storage":[8],"of":[9,16,101,124,231],"computational":[10],"data":[11,49],"wide":[14],"range":[15],"applications,":[17],"including":[18,42],"highly":[19],"sensitive":[20],"assets":[21],"such":[22,54],"as":[23],"banking":[24],"transactions,":[25],"cryptographic":[26],"keys,":[27],"and":[28,39,98,110,144,166,180,204,223],"user":[29],"credentials.":[30],"However,":[31],"systems":[33,238],"remain":[34],"vulnerable":[35],"to":[36,69,79,82,120,208],"advanced":[37],"physical":[38],"side-channel":[40],"attacks,":[41],"cold":[43,86,128,219],"boot":[44,87,129],"attacks":[45],"that":[46,89,162,194],"exploit":[47],"residual":[48],"after":[50],"power-down.":[51],"To":[52],"mitigate":[53],"risks,":[55],"Intel\u2019s":[56],"DDR3":[57,125,211],"scrambler":[59],"uses":[60],"Linear":[62],"Feedback":[63],"Shift":[64],"Register":[65],"(LFSR)-based":[66],"stream":[67],"cipher":[68],"obscure":[70],"contents.":[72],"Nevertheless,":[73],"this":[74],"mechanism":[75,135],"has":[76],"been":[77],"shown":[78],"be":[80],"susceptible":[81],"stencil":[83],"attack,":[84],"technique":[88],"reconstructs":[90],"scrambling":[92,112],"key":[93,151],"by":[94,140],"leveraging":[95],"linear":[97],"periodic":[99],"nature":[100],"keystream.":[103],"This":[104],"article":[105],"proposes":[106],"novel,":[108],"lightweight,":[109],"secure":[111,236],"architecture":[113],"based":[114],"on":[115,188],"generic":[117,133],"LFSR":[118,146],"designed":[119],"enhance":[121],"security":[123,174],"against":[127,217],"attacks.":[130,225],"The":[131,184],"proposed":[132,170,196,233],"LFSR-based":[134],"eliminates":[136],"differential":[137,150],"keystream":[138],"periodicity":[139],"introducing":[141],"an":[142],"address-":[143],"seed-dependent":[145],"structure,":[147],"thereby":[148],"rendering":[149],"recovery":[152],"techniques":[153],"computationally":[154],"infeasible.":[155],"Furthermore,":[156],"unlike":[157],"traditional":[158],"AES-based":[159],"encryption":[161],"incurs":[163],"high":[164],"latency":[165],"area":[167],"overhead,":[168],"approach":[171],"achieves":[172],"comparable":[173,207],"guarantees":[175],"with":[176],"low":[177],"hardware":[178,185],"complexity":[179],"zero":[181],"access":[182],"latency.":[183],"implementation":[186],"results":[187,227],"Xilinx":[190],"VCU118":[191],"FPGA":[192],"show":[193],"scheme":[197,234],"consumes":[198],"only":[199],"252":[200],"LUTs,":[201],"256":[202],"registers":[203],"104":[205],"slices,":[206],"Intel":[210],"scrambler,":[212],"while":[213],"offering":[214],"superior":[215],"resilience":[216],"boot,":[220,222],"warm":[221],"probing":[224],"These":[226],"demonstrate":[228],"practicality":[230],"for":[235],"resource-constrained":[240],"environments.":[241]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
