{"id":"https://openalex.org/W4412636366","doi":"https://doi.org/10.1145/3750448","title":"RACER: Avoiding End-to-End Slowdowns in Accelerated Chip Multi-Processors","display_name":"RACER: Avoiding End-to-End Slowdowns in Accelerated Chip Multi-Processors","publication_year":2025,"publication_date":"2025-07-24","ids":{"openalex":"https://openalex.org/W4412636366","doi":"https://doi.org/10.1145/3750448"},"language":"en","primary_location":{"id":"doi:10.1145/3750448","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3750448","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3750448","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3750448","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042812673","display_name":"Neel Patel","orcid":"https://orcid.org/0000-0002-8055-4243"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Neel Patel","raw_affiliation_strings":["Electrical and Computer Engineering, Cornell University","Electrical and Computer Engineering, Cornell University, Ithaca, United States"],"raw_orcid":"https://orcid.org/0000-0002-8055-4243","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Cornell University","institution_ids":["https://openalex.org/I205783295"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Cornell University, Ithaca, United States","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088502854","display_name":"Ren Wang","orcid":"https://orcid.org/0009-0005-2937-5804"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ren Wang","raw_affiliation_strings":["Intel Labs","Intel Labs, Portland, United States"],"raw_orcid":"https://orcid.org/0009-0005-2937-5804","affiliations":[{"raw_affiliation_string":"Intel Labs","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Labs, Portland, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069911395","display_name":"Mohammad Alian","orcid":"https://orcid.org/0000-0002-4622-2181"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mohammad Alian","raw_affiliation_strings":["Electrical and Computer Engineering, Cornell University","Electrical and Computer Engineering, Cornell University, Ithaca, United States"],"raw_orcid":"https://orcid.org/0000-0002-4622-2181","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Cornell University","institution_ids":["https://openalex.org/I205783295"]},{"raw_affiliation_string":"Electrical and Computer Engineering, Cornell University, Ithaca, United States","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16309392,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"22","issue":"3","first_page":"1","last_page":"22"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7511769533157349},{"id":"https://openalex.org/keywords/end-to-end-principle","display_name":"End-to-end principle","score":0.6744128465652466},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5348955988883972},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3801693320274353},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3590739667415619},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14625638723373413},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11280721426010132}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7511769533157349},{"id":"https://openalex.org/C74296488","wikidata":"https://www.wikidata.org/wiki/Q2527392","display_name":"End-to-end principle","level":2,"score":0.6744128465652466},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5348955988883972},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3801693320274353},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3590739667415619},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14625638723373413},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11280721426010132}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3750448","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3750448","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3750448","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1145/3750448","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3750448","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3750448","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1452086972","display_name":null,"funder_award_id":"JUMP 2.0","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"},{"id":"https://openalex.org/G599137258","display_name":null,"funder_award_id":"JUMP 2.0","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"},{"id":"https://openalex.org/G879073502","display_name":"CAREER: Near-Memory Datacenter Network","funder_award_id":"2239020","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4412636366.pdf","grobid_xml":"https://content.openalex.org/works/W4412636366.grobid-xml"},"referenced_works_count":27,"referenced_works":["https://openalex.org/W2000041758","https://openalex.org/W2024171325","https://openalex.org/W2087440962","https://openalex.org/W2148103955","https://openalex.org/W2561995440","https://openalex.org/W2904726211","https://openalex.org/W2910218719","https://openalex.org/W2973643951","https://openalex.org/W3047709334","https://openalex.org/W3147196396","https://openalex.org/W3157813827","https://openalex.org/W3199375732","https://openalex.org/W3206634207","https://openalex.org/W4220980777","https://openalex.org/W4230888176","https://openalex.org/W4236504400","https://openalex.org/W4244923394","https://openalex.org/W4245602507","https://openalex.org/W4247144579","https://openalex.org/W4248722156","https://openalex.org/W4281784760","https://openalex.org/W4308084023","https://openalex.org/W4392746141","https://openalex.org/W4393407063","https://openalex.org/W4394999211","https://openalex.org/W4403334638","https://openalex.org/W4408902255"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2151749779","https://openalex.org/W3179968364","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109"],"abstract_inverted_index":{"Recent":[0],"chip":[1],"multiprocessors":[2],"incorporate":[3],"several":[4,43],"on-chip":[5,87,111],"accelerators,":[6,88],"marking":[7],"the":[8,11,20,49,52,69,105,134],"beginning":[9],"of":[10,23,51,71,107,136,146,151],"Accelerated":[12],"Chip":[13],"Multi-Processor":[14],"(XMP)":[15],"era":[16],"in":[17],"datacenters.":[18],"Despite":[19],"close":[21],"proximity":[22],"accelerators":[24,31,40,102],"and":[25,64,86,94,101,129,154],"general-purpose":[26,84,99],"cores,":[27],"offloading":[28],"functions":[29],"to":[30,38,103],"may":[32],"not":[33],"always":[34],"be":[35],"beneficial.":[36],"Offloading":[37],"hardware":[39,62,76,137],"can":[41,47],"introduce":[42],"end-to-end":[44,72],"overheads":[45],"that":[46,67,109,156],"negate":[48],"speedup":[50],"accelerable":[53,127],"function.":[54],"In":[55],"this":[56],"article,":[57],"we":[58],"design":[59],"RACER,":[60],"a":[61,80,140,149],"architecture":[63],"runtime":[65],"system":[66],"evades":[68],"danger":[70],"slowdowns":[73],"when":[74],"using":[75],"acceleration.":[77],"RACER":[78,115,132],"leverages":[79],"low-overhead":[81],"interface":[82],"between":[83,98],"cores":[85,100],"fine-grained":[89],"context":[90],"switching,":[91],"accelerator-initiated":[92],"preemption,":[93],"seamless":[95],"data":[96],"motion":[97],"improve":[104],"performance":[106,135],"workloads":[108,121,153],"use":[110],"accelerators.":[112],"We":[113],"evaluate":[114],"on":[116,139,148],"five":[117],"representative":[118],"request":[119],"processing":[120],"featuring":[122],"diverse":[123,152],"memory":[124],"access":[125],"patterns,":[126],"functions,":[128],"compute":[130],"intensities.":[131],"improves":[133],"acceleration":[138],"real":[141],"XMP":[142],"by":[143],"an":[144],"average":[145],"1.31\u00d7":[147],"range":[150],"guarantees":[155],"accelerator":[157],"offloads":[158],"never":[159],"cause":[160],"slowdowns.":[161]},"counts_by_year":[],"updated_date":"2026-07-31T08:31:51.225901","created_date":"2025-10-10T00:00:00"}
