{"id":"https://openalex.org/W7128045329","doi":"https://doi.org/10.1145/3748173.3779574","title":"PROM: Protection against Reverse Engineering Attacks through Programmable Logic Macros","display_name":"PROM: Protection against Reverse Engineering Attacks through Programmable Logic Macros","publication_year":2026,"publication_date":"2026-02-05","ids":{"openalex":"https://openalex.org/W7128045329","doi":"https://doi.org/10.1145/3748173.3779574"},"language":null,"primary_location":{"id":"doi:10.1145/3748173.3779574","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3748173.3779574","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3748173.3779574","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5125172920","display_name":"Pravin Gaikwad","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pravin Gaikwad","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5125150439","display_name":"Aritra Dasgupta","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aritra Dasgupta","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092645197","display_name":"Sudipta Paria","orcid":"https://orcid.org/0009-0002-7726-8032"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sudipta Paria","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029338405","display_name":"Peyman Dehghanzadeh","orcid":"https://orcid.org/0000-0002-1171-4370"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peyman Dehghanzadeh","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036621906","display_name":"Jonathan Cruz","orcid":"https://orcid.org/0000-0002-7404-9259"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jonathan Cruz","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5125222432","display_name":"Swarup Bhunia","orcid":null},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Swarup Bhunia","raw_affiliation_strings":["University of Florida, Gainesville, FL, USA"],"affiliations":[{"raw_affiliation_string":"University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5125172920"],"corresponding_institution_ids":["https://openalex.org/I33213144"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.6215307,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"180","last_page":"180"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.00279999990016222,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.0010999999940395355,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redaction","display_name":"Redaction","score":0.781499981880188},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5347999930381775},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.400299996137619},{"id":"https://openalex.org/keywords/reverse-engineering","display_name":"Reverse engineering","score":0.37059998512268066},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.36559998989105225},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.34139999747276306},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.337799996137619},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.33090001344680786}],"concepts":[{"id":"https://openalex.org/C2776795254","wikidata":"https://www.wikidata.org/wiki/Q561071","display_name":"Redaction","level":2,"score":0.781499981880188},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6899999976158142},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5347999930381775},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5284000039100647},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.400299996137619},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37959998846054077},{"id":"https://openalex.org/C207850805","wikidata":"https://www.wikidata.org/wiki/Q269608","display_name":"Reverse engineering","level":2,"score":0.37059998512268066},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.36559998989105225},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.34139999747276306},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.337799996137619},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.33090001344680786},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.3197000026702881},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.29989999532699585},{"id":"https://openalex.org/C71745522","wikidata":"https://www.wikidata.org/wiki/Q2476929","display_name":"Confidentiality","level":2,"score":0.2922999858856201},{"id":"https://openalex.org/C39217717","wikidata":"https://www.wikidata.org/wiki/Q1432354","display_name":"Hardware security module","level":3,"score":0.29030001163482666},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.2865000069141388},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.2842000126838684},{"id":"https://openalex.org/C134765980","wikidata":"https://www.wikidata.org/wiki/Q879126","display_name":"Bitwise operation","level":2,"score":0.2728999853134155},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.2655999958515167},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.2556999921798706},{"id":"https://openalex.org/C40305131","wikidata":"https://www.wikidata.org/wiki/Q2616305","display_name":"Obfuscation","level":2,"score":0.2524999976158142},{"id":"https://openalex.org/C188087704","wikidata":"https://www.wikidata.org/wiki/Q369577","display_name":"Standardization","level":2,"score":0.2524999976158142}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3748173.3779574","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3748173.3779574","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3748173.3779574","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3748173.3779574","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W4411156946"],"related_works":[],"abstract_inverted_index":{"The":[0,58,81,149],"modern":[1],"supply":[2],"chain":[3],"ecosystem":[4],"exposes":[5],"hardware":[6,88],"intellectual":[7],"property":[8],"(IP)":[9],"blocks":[10],"to":[11,65,96,103,111,138,165,169],"diverse":[12],"confidentiality":[13],"attacks":[14],"aimed":[15],"at":[16],"reverse":[17],"engineering":[18],"(RE),":[19],"piracy,":[20],"or":[21,74],"the":[22,43,51,112,140,183],"extraction":[23],"of":[24,46,142,158,190,199],"design":[25,31],"secrets.":[26],"An":[27],"emerging":[28],"and":[29,49,98,119,203,210],"potent":[30],"solution":[32],"for":[33,116],"IP":[34],"protection":[35,176],"against":[36,40,177],"these":[37],"attacks,":[38],"particularly":[39],"RE,":[41],"is":[42,153],"fine-grained":[44],"redaction":[45,83,130,144,171,185],"security-critical":[47,151],"logic":[48,53,152],"replacing":[50],"redacted":[52,150],"with":[54,90,145,196],"lookup":[55],"tables":[56],"(LUTs).":[57],"LUTs":[59],"are":[60,163],"then":[61],"programmed":[62],"in-field,":[63],"similar":[64],"FPGAs,":[66],"using":[67,155],"protected":[68],"bitstreams,":[69],"thereby":[70],"preventing":[71],"untrusted":[72],"foundries":[73],"test/assembly":[75],"facilities":[76],"from":[77,94,101],"mounting":[78],"RE":[79,179],"attacks.":[80,180],"LUT-based":[82,143],"paradigm":[84],"incurs":[85],"a":[86,127,156,188],"substantial":[87],"cost,":[89],"area":[91,202],"overhead":[92,100,147],"ranging":[93],"70x":[95],"100x":[97],"delay":[99],"2x":[102],"5x,":[104],"while":[105,173],"also":[106],"often":[107],"necessitating":[108],"significant":[109],"alterations":[110],"commercial":[113],"tool":[114],"flow":[115],"design,":[117],"verification,":[118],"testing.":[120],"In":[121],"this":[122],"work,":[123],"we":[124],"propose":[125],"PROM,":[126],"robust":[128,194],"fine-grain":[129],"technique":[131,186],"inspired":[132],"by":[133],"structured":[134],"ASIC,":[135],"that":[136,162],"aims":[137],"address":[139],"limitations":[141],"novel":[146],"optimizations.":[148],"implemented":[154],"library":[157],"custom-design":[159],"PROM":[160],"cells":[161],"optimized":[164],"minimize":[166],"overheads":[167,198],"compared":[168],"state-of-the-art":[170],"techniques":[172],"providing":[174],"strong":[175],"various":[178],"We":[181],"evaluated":[182],"proposed":[184],"across":[187],"range":[189],"open-source":[191],"benchmarks,":[192],"achieving":[193],"security":[195],"average":[197],"1.42x":[200],"in":[201,205],"1.09x":[204],"delay,":[206],"demonstrating":[207],"its":[208],"efficiency":[209],"practicality.":[211]},"counts_by_year":[],"updated_date":"2026-02-07T06:15:42.627816","created_date":"2026-02-07T00:00:00"}
