{"id":"https://openalex.org/W4410400881","doi":"https://doi.org/10.1145/3728179.3728188","title":"Minimizing Local Interconnections to Reduce Chip Area in eFPGAs","display_name":"Minimizing Local Interconnections to Reduce Chip Area in eFPGAs","publication_year":2025,"publication_date":"2025-05-15","ids":{"openalex":"https://openalex.org/W4410400881","doi":"https://doi.org/10.1145/3728179.3728188"},"language":"en","primary_location":{"id":"doi:10.1145/3728179.3728188","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3728179.3728188","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3728179.3728188","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102316024","display_name":"Kenshu Seto","orcid":null},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kenshu Seto","raw_affiliation_strings":["Kumamoto University, Kumamoto, Japan"],"raw_orcid":"https://orcid.org/0009-0002-5391-1636","affiliations":[{"raw_affiliation_string":"Kumamoto University, Kumamoto, Japan","institution_ids":["https://openalex.org/I96036126"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059705629","display_name":"Masahiro Iida","orcid":"https://orcid.org/0000-0002-9654-2319"},"institutions":[{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Iida","raw_affiliation_strings":["Kumamoto University, Kumamoto, Japan"],"raw_orcid":"https://orcid.org/0000-0002-9654-2319","affiliations":[{"raw_affiliation_string":"Kumamoto University, Kumamoto, Japan","institution_ids":["https://openalex.org/I96036126"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07559564,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"138","last_page":"141"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5802319645881653},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.525642991065979},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.43576693534851074},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38865724205970764},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14521107077598572}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5802319645881653},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.525642991065979},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.43576693534851074},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38865724205970764},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14521107077598572}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3728179.3728188","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3728179.3728188","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3728179.3728188","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3728179.3728188","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2072249022","https://openalex.org/W2104812993","https://openalex.org/W3027559990","https://openalex.org/W3130402546"],"related_works":["https://openalex.org/W2036806516","https://openalex.org/W2065289416","https://openalex.org/W1967394420","https://openalex.org/W2565425548","https://openalex.org/W2392009442","https://openalex.org/W2087695844","https://openalex.org/W2017236304","https://openalex.org/W2154106283","https://openalex.org/W2912613323","https://openalex.org/W2142443274"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}