{"id":"https://openalex.org/W4407953389","doi":"https://doi.org/10.1145/3706628.3708842","title":"PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis","display_name":"PipeLink: A Pipelined Resource Sharing System for Dataflow High-Level Synthesis","publication_year":2025,"publication_date":"2025-02-26","ids":{"openalex":"https://openalex.org/W4407953389","doi":"https://doi.org/10.1145/3706628.3708842"},"language":"en","primary_location":{"id":"doi:10.1145/3706628.3708842","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3706628.3708842","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Rui Li","orcid":"https://orcid.org/0000-0002-5683-9441"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rui Li","raw_affiliation_strings":["Intel Corporation, Santa Clara, California, USA"],"raw_orcid":"https://orcid.org/0000-0002-5683-9441","affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, California, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002575415","display_name":"Rajit Manohar","orcid":"https://orcid.org/0000-0001-8211-6602"},"institutions":[{"id":"https://openalex.org/I32971472","display_name":"Yale University","ror":"https://ror.org/03v76x132","country_code":"US","type":"education","lineage":["https://openalex.org/I32971472"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajit Manohar","raw_affiliation_strings":["Yale University, New Haven, Connecticut, USA"],"raw_orcid":"https://orcid.org/0000-0001-8211-6602","affiliations":[{"raw_affiliation_string":"Yale University, New Haven, Connecticut, USA","institution_ids":["https://openalex.org/I32971472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.01680838,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"182","last_page":"182"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9757000207901001,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9371347427368164},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.801948070526123},{"id":"https://openalex.org/keywords/shared-resource","display_name":"Shared resource","score":0.5659428834915161},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5191806554794312},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.5035611987113953},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4715057909488678},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4333966076374054},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.43132147192955017},{"id":"https://openalex.org/keywords/resource-management","display_name":"Resource management (computing)","score":0.41035377979278564},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35638585686683655},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2547111511230469},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1981746256351471},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.162181556224823},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.139055997133255}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9371347427368164},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.801948070526123},{"id":"https://openalex.org/C51332947","wikidata":"https://www.wikidata.org/wiki/Q1172305","display_name":"Shared resource","level":2,"score":0.5659428834915161},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5191806554794312},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.5035611987113953},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4715057909488678},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4333966076374054},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.43132147192955017},{"id":"https://openalex.org/C2780609101","wikidata":"https://www.wikidata.org/wiki/Q17156588","display_name":"Resource management (computing)","level":2,"score":0.41035377979278564},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35638585686683655},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2547111511230469},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1981746256351471},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.162181556224823},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.139055997133255}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3706628.3708842","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3706628.3708842","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2018055497","https://openalex.org/W2475663704","https://openalex.org/W3042722602"],"related_works":["https://openalex.org/W2461217932","https://openalex.org/W3206653210","https://openalex.org/W2064431979","https://openalex.org/W2196541947","https://openalex.org/W1972821547","https://openalex.org/W4233035441","https://openalex.org/W2058369727","https://openalex.org/W2530146034","https://openalex.org/W2145890695","https://openalex.org/W3184916136"],"abstract_inverted_index":{"High-level":[0],"synthesis":[1,57],"(HLS)":[2],"has":[3],"received":[4],"significant":[5],"interest":[6],"in":[7],"hardware":[8,21],"accelerator":[9],"design":[10,17,22],"due":[11],"to":[12,15,25,59,66],"its":[13],"ability":[14],"reduce":[16],"time":[18,58],"and":[19,43],"make":[20],"more":[23],"accessible":[24],"software":[26],"developers":[27],"[3].":[28],"HLS":[29,40,45,50,75,98],"methodologies":[30],"can":[31],"be":[32],"categorized":[33],"into":[34,78],"two":[35],"main":[36],"approaches:":[37],"statically":[38],"scheduled":[39,49],"[2,":[41],"4]":[42],"dataflow":[44,74,79,97],"[5,":[46],"6].":[47],"Statically":[48],"requires":[51],"precise":[52],"operator":[53],"delay":[54],"information":[55],"at":[56],"generate":[60],"optimized":[61],"schedules,":[62],"which":[63],"often":[64],"lead":[65],"suboptimal":[67],"performance":[68],"under":[69],"dynamic":[70],"workloads.":[71],"In":[72],"contrast,":[73],"maps":[76],"programs":[77],"circuits":[80],"composed":[81],"of":[82,108],"concurrent,":[83],"independent":[84],"elements":[85],"that":[86],"communicate":[87],"using":[88],"local":[89],"control":[90],"protocols":[91],"(e.g.,":[92],"handshake":[93],"or":[94],"ready/valid).":[95],"While":[96],"enables":[99],"automatic":[100],"pipelining":[101],"without":[102],"requiring":[103],"global":[104],"control,":[105],"the":[106],"lack":[107],"centralized":[109],"coordination":[110],"complicates":[111],"efficient":[112],"resource":[113],"sharing.":[114]},"counts_by_year":[],"updated_date":"2026-08-18T07:49:30.821534","created_date":"2025-10-10T00:00:00"}