{"id":"https://openalex.org/W4403103392","doi":"https://doi.org/10.1145/3697835","title":"EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator","display_name":"EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator","publication_year":2024,"publication_date":"2024-10-03","ids":{"openalex":"https://openalex.org/W4403103392","doi":"https://doi.org/10.1145/3697835"},"language":"en","primary_location":{"id":"doi:10.1145/3697835","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3697835","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083734260","display_name":"Shikha Goel","orcid":"https://orcid.org/0009-0000-8744-1789"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shikha Goel","raw_affiliation_strings":["The Amar Nath and Shashi Khosla School of Information Technology, Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0009-0000-8744-1789","affiliations":[{"raw_affiliation_string":"The Amar Nath and Shashi Khosla School of Information Technology, Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013807519","display_name":"Rajesh Kedia","orcid":"https://orcid.org/0000-0003-3711-0396"},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rajesh Kedia","raw_affiliation_strings":["Computer Sc. and Engg., Indian Institute of Technology Hyderabad, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0003-3711-0396","affiliations":[{"raw_affiliation_string":"Computer Sc. and Engg., Indian Institute of Technology Hyderabad, Hyderabad, India","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074675503","display_name":"Rijurekha Sen","orcid":"https://orcid.org/0000-0002-2465-3650"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rijurekha Sen","raw_affiliation_strings":["Computer Sc. and Engg., Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0000-0002-2465-3650","affiliations":[{"raw_affiliation_string":"Computer Sc. and Engg., Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"last","author":{"id":null,"display_name":"M Balakrishnan","orcid":"https://orcid.org/0009-0001-9136-4939"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M Balakrishnan","raw_affiliation_strings":["Computer Sc. and Engg., Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0009-0001-9136-4939","affiliations":[{"raw_affiliation_string":"Computer Sc. and Engg., Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5192,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.65149498,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"24","issue":"1","first_page":"1","last_page":"31"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.992900013923645,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9912999868392944,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6281200647354126},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5993184447288513},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4911288917064667},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.48013779520988464},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36878502368927},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3364298343658447}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6281200647354126},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5993184447288513},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4911288917064667},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.48013779520988464},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36878502368927},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3364298343658447}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3697835","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3697835","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G8626783513","display_name":null,"funder_award_id":"SRG/2022/001083","funder_id":"https://openalex.org/F4320334771","funder_display_name":"Science and Engineering Research Board"}],"funders":[{"id":"https://openalex.org/F4320334771","display_name":"Science and Engineering Research Board","ror":"https://ror.org/03ffdsr55"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":46,"referenced_works":["https://openalex.org/W2276486856","https://openalex.org/W2294282016","https://openalex.org/W2401063723","https://openalex.org/W2535919346","https://openalex.org/W2583383421","https://openalex.org/W2604319603","https://openalex.org/W2607159714","https://openalex.org/W2613574453","https://openalex.org/W2616014673","https://openalex.org/W2745045259","https://openalex.org/W2758264231","https://openalex.org/W2761262947","https://openalex.org/W2889370858","https://openalex.org/W2911037141","https://openalex.org/W2911964244","https://openalex.org/W2935614364","https://openalex.org/W2946425846","https://openalex.org/W2962822620","https://openalex.org/W2962862017","https://openalex.org/W2963701245","https://openalex.org/W2965973489","https://openalex.org/W2985324865","https://openalex.org/W2997106510","https://openalex.org/W3004127905","https://openalex.org/W3061070527","https://openalex.org/W3100638618","https://openalex.org/W3102169921","https://openalex.org/W3115175310","https://openalex.org/W3134410876","https://openalex.org/W3148190804","https://openalex.org/W3160369968","https://openalex.org/W3165698711","https://openalex.org/W4200195825","https://openalex.org/W4220877690","https://openalex.org/W4242577057","https://openalex.org/W4250646739","https://openalex.org/W4293024010","https://openalex.org/W4293025058","https://openalex.org/W4311839580","https://openalex.org/W4312998584","https://openalex.org/W4366310705","https://openalex.org/W4386764003","https://openalex.org/W4386764053","https://openalex.org/W4386764983","https://openalex.org/W4391985770","https://openalex.org/W6760385162"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"Deep":[0],"learning":[1],"Processor":[2],"Unit":[3],"(DPU)":[4],"is":[5,127,175],"a":[6,13,39,82,97,132],"highly":[7],"configurable":[8],"CNN":[9,61,95],"accelerator":[10],"that":[11],"supports":[12],"variety":[14],"of":[15,33,56,92,119,122,156,165],"CNNs":[16,35,112],"and":[17,36,65,103,143,158],"can":[18,45],"be":[19],"implemented":[20],"with":[21],"multiple":[22],"instances":[23],"on":[24,63,96,129],"the":[25,48,53,67,76,89,120,163],"same":[26],"FPGA.":[27],"Many":[28],"applications":[29],"deploy":[30],"concurrent":[31],"execution":[32,42,62,70,90,152],"different":[34,57],"in":[37,69,113],"such":[38],"setting,":[40],"an":[41,150],"time":[43,71,91,153],"predictor":[44],"help":[46],"\u201coptimize\u201d":[47],"DPU":[49,98],"configurations":[50],"to":[51,73,87,109],"meet":[52],"performance":[54],"requirements":[55],"tasks.":[58],"We":[59,106,161],"characterize":[60],"DPUs":[64],"reduce":[66],"variability":[68],"due":[72],"interference":[74],"from":[75,131],"operating":[77],"system.":[78],"Subsequently,":[79],"we":[80],"propose":[81],"machine":[83],"learning-based":[84],"framework":[85],"(EXPRESS)":[86],"predict":[88],"any":[93],"given":[94],"configuration,":[99],"considering":[100],"CNN,":[101],"DPU,":[102],"bus":[104],"characteristics.":[105],"improvise":[107],"EXPRESS":[108,142],"support":[110],"heterogeneous":[111],"EXPRESS-2.0":[114],"by":[115,148],"making":[116],"features":[117],"independent":[118],"number":[121],"CNNs.":[123,139],"Our":[124,140],"entire":[125],"experimentation":[126],"based":[128],"data":[130],"real":[133],"FPGA":[134],"board":[135],"for":[136,170,178],"16":[137],"standard":[138],"frameworks,":[141],"EXPRESS-2.0,":[144],"significantly":[145],"outperform":[146],"state-of-the-art":[147],"achieving":[149],"average":[151],"prediction":[154,168],"error":[155,169],"2.2%":[157],"0.7%,":[159],"respectively.":[160],"illustrate":[162],"effectiveness":[164],"this":[166],"low":[167],"design":[171],"space":[172],"exploration,":[173],"which":[174],"very":[176],"useful":[177],"embedded":[179],"system":[180],"application":[181],"developers.":[182]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-05-21T06:26:12.895304","created_date":"2025-10-10T00:00:00"}