{"id":"https://openalex.org/W4406022814","doi":"https://doi.org/10.1145/3676536.3676676","title":"Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement","display_name":"Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement","publication_year":2024,"publication_date":"2024-10-27","ids":{"openalex":"https://openalex.org/W4406022814","doi":"https://doi.org/10.1145/3676536.3676676"},"language":"en","primary_location":{"id":"doi:10.1145/3676536.3676676","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3676536.3676676","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3676536.3676676","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3676536.3676676","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101608841","display_name":"Hongyang Pan","orcid":"https://orcid.org/0009-0009-0874-4518"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hongyang Pan","raw_affiliation_strings":["State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113325498","display_name":"Cunqing Lan","orcid":null},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Cunqing Lan","raw_affiliation_strings":["State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100664843","display_name":"Yiting Liu","orcid":"https://orcid.org/0000-0001-8078-6717"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yiting Liu","raw_affiliation_strings":["School of Computer Science, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078035974","display_name":"Zhiang Wang","orcid":"https://orcid.org/0000-0002-6669-9702"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhiang Wang","raw_affiliation_strings":["University of California at San Diego, La Jolla, USA"],"affiliations":[{"raw_affiliation_string":"University of California at San Diego, La Jolla, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004722925","display_name":"Li Shang","orcid":"https://orcid.org/0000-0003-3944-7531"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Shang","raw_affiliation_strings":["School of Computer Science, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"School of Computer Science, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064213921","display_name":"Xuan Zeng","orcid":"https://orcid.org/0000-0002-8097-4053"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuan Zeng","raw_affiliation_strings":["State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I4210132426"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045464812","display_name":"Fan Yang","orcid":"https://orcid.org/0000-0003-2164-8175"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Yang","raw_affiliation_strings":["State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I4210132426"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079056437","display_name":"Keren Zhu","orcid":"https://orcid.org/0000-0003-2698-141X"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Keren Zhu","raw_affiliation_strings":["State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China"],"affiliations":[{"raw_affiliation_string":"State Key Lab of Integrated Circuits and Systems, School of Microelectronics, Fudan university, Shanghai, China","institution_ids":["https://openalex.org/I4210132426"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5079056437"],"corresponding_institution_ids":["https://openalex.org/I4210132426"],"apc_list":null,"apc_paid":null,"fwci":3.3569,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.94073705,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7149599194526672},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.609342098236084},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5896937251091003},{"id":"https://openalex.org/keywords/place-and-route","display_name":"Place and route","score":0.5504669547080994},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.5497258305549622},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.5463131666183472},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5435227751731873},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5362445712089539},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.48291894793510437},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.48055794835090637},{"id":"https://openalex.org/keywords/performance-metric","display_name":"Performance metric","score":0.4667081832885742},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.43197891116142273},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.42641395330429077},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4226200580596924},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42127907276153564},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4205930829048157},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3767874836921692},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3656347393989563},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24142268300056458},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.20130106806755066},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.1801731288433075},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14629817008972168},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11083203554153442},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10668367147445679},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.09501877427101135}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7149599194526672},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.609342098236084},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5896937251091003},{"id":"https://openalex.org/C127879752","wikidata":"https://www.wikidata.org/wiki/Q3390760","display_name":"Place and route","level":3,"score":0.5504669547080994},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.5497258305549622},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.5463131666183472},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5435227751731873},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5362445712089539},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.48291894793510437},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.48055794835090637},{"id":"https://openalex.org/C2780898871","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Performance metric","level":2,"score":0.4667081832885742},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.43197891116142273},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.42641395330429077},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4226200580596924},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42127907276153564},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4205930829048157},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3767874836921692},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3656347393989563},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24142268300056458},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.20130106806755066},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.1801731288433075},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14629817008972168},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11083203554153442},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10668367147445679},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.09501877427101135},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3676536.3676676","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3676536.3676676","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3676536.3676676","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:2408.07886","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2408.07886","pdf_url":"https://arxiv.org/pdf/2408.07886","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"doi:10.1145/3676536.3676676","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3676536.3676676","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3676536.3676676","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8600000143051147,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1231421488","display_name":null,"funder_award_id":"under","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G2087396116","display_name":null,"funder_award_id":"China","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G3317480652","display_name":null,"funder_award_id":"Science","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G3495785756","display_name":null,"funder_award_id":"92373207","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G4020255992","display_name":null,"funder_award_id":"Project","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5760752404","display_name":null,"funder_award_id":"Projects","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5939423041","display_name":null,"funder_award_id":"Technology","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G5994120800","display_name":null,"funder_award_id":"Natural","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4406022814.pdf","grobid_xml":"https://content.openalex.org/works/W4406022814.grobid-xml"},"referenced_works_count":28,"referenced_works":["https://openalex.org/W35668030","https://openalex.org/W1592365454","https://openalex.org/W1905608265","https://openalex.org/W1999938868","https://openalex.org/W2025617772","https://openalex.org/W2039485990","https://openalex.org/W2080393125","https://openalex.org/W2110445184","https://openalex.org/W2118498286","https://openalex.org/W2123980833","https://openalex.org/W2150787480","https://openalex.org/W2153090913","https://openalex.org/W2157541699","https://openalex.org/W2160007289","https://openalex.org/W2346205343","https://openalex.org/W2992137891","https://openalex.org/W3091843774","https://openalex.org/W3125953074","https://openalex.org/W4210938977","https://openalex.org/W4230225091","https://openalex.org/W4248136059","https://openalex.org/W4285224955","https://openalex.org/W4292092927","https://openalex.org/W4389163006","https://openalex.org/W4389166745","https://openalex.org/W4390097745","https://openalex.org/W4390098039","https://openalex.org/W6841939121"],"related_works":["https://openalex.org/W3141861494","https://openalex.org/W2781601456","https://openalex.org/W3010631755","https://openalex.org/W2161004825","https://openalex.org/W2783276420","https://openalex.org/W2186482337","https://openalex.org/W2115502122","https://openalex.org/W2044534563","https://openalex.org/W2735446578","https://openalex.org/W2543290882"],"abstract_inverted_index":{"A":[0],"typical":[1],"VLSI":[2],"design":[3,15,28],"flow":[4,153],"is":[5,94],"divided":[6],"into":[7],"separated":[8],"front-end":[9],"logic":[10,63],"synthesis":[11,47],"and":[12,45,49,54,114,129,177],"back-end":[13],"physical":[14,40],"(PD)":[16],"stages,":[17],"which":[18],"often":[19],"require":[20],"costly":[21],"iterations":[22],"between":[23],"these":[24,73],"stages":[25],"to":[26,42,71,89,110,120],"achieve":[27,111],"closure.":[29],"Existing":[30],"approaches":[31],"face":[32],"significant":[33],"challenges,":[34],"notably":[35],"in":[36,50,126,175,181],"utilizing":[37],"feedback":[38],"from":[39],"metrics":[41],"better":[43],"adapt":[44],"refine":[46],"operations,":[48],"establishing":[51],"a":[52,60,82,99,115,172,178],"unified":[53],"comprehensive":[55],"metric.":[56],"This":[57],"paper":[58],"introduces":[59],"new":[61],"Primitive":[62],"gate":[64],"placement":[65],"guided":[66],"technology":[67],"MAPping":[68],"(PigMAP)":[69],"framework":[70,135],"address":[72],"challenges.":[74],"With":[75],"approximating":[76],"technology-independent":[77],"spatial":[78],"information,":[79],"we":[80],"develop":[81],"novel":[83],"wirelength":[84],"(WL)":[85],"driven":[86],"mapping":[87],"algorithm":[88],"produce":[90],"PD-friendly":[91],"netlists.":[92],"PigMAP":[93],"equipped":[95],"with":[96,141,151],"two":[97],"schemes:":[98],"performance":[100,130,155],"mode":[101,117,156,170],"that":[102,118],"focuses":[103],"on":[104],"optimizing":[105],"the":[106,122,137,145],"critical":[107],"path":[108],"WL":[109],"high":[112],"performance,":[113],"power":[116,128,163,169,182],"aims":[119],"minimize":[121],"total":[123],"WL,":[124],"resulting":[125],"balanced":[127],"outcomes.":[131],"We":[132],"evaluate":[133],"our":[134],"using":[136,144],"EPFL":[138],"benchmark":[139],"suites":[140],"ASAP7":[142],"technology,":[143],"OpenROAD":[146,152],"tool":[147],"for":[148],"place-and-route.":[149],"Compared":[150],"scripts,":[154],"reduces":[157],"delay":[158,176],"by":[159,165],"14%":[160],"while":[161],"increasing":[162],"consumption":[164],"only":[166],"6%.":[167],"Meanwhile,":[168],"achieves":[171],"3%":[173],"improvement":[174],"9%":[179],"reduction":[180],"consumption.":[183]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":1}],"updated_date":"2026-04-15T08:11:43.952461","created_date":"2025-10-10T00:00:00"}
