{"id":"https://openalex.org/W4399723230","doi":"https://doi.org/10.1145/3665283.3665300","title":"VIPER: A VTR Interface for Placement with Error Resilience","display_name":"VIPER: A VTR Interface for Placement with Error Resilience","publication_year":2024,"publication_date":"2024-06-17","ids":{"openalex":"https://openalex.org/W4399723230","doi":"https://doi.org/10.1145/3665283.3665300"},"language":"en","primary_location":{"id":"doi:10.1145/3665283.3665300","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3665283.3665300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037959171","display_name":"Kate Thurmer","orcid":"https://orcid.org/0009-0007-4519-5947"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Kate Thurmer","raw_affiliation_strings":["University of Toronto, Canada"],"raw_orcid":"https://orcid.org/0009-0007-4519-5947","affiliations":[{"raw_affiliation_string":"University of Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030184404","display_name":"Vaughn Betz","orcid":"https://orcid.org/0000-0003-0528-6493"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Vaughn Betz","raw_affiliation_strings":["University of Toronto, Canada"],"raw_orcid":"https://orcid.org/0000-0003-0528-6493","affiliations":[{"raw_affiliation_string":"University of Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.329,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.79185296,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"99","last_page":"108"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/viper","display_name":"VIPeR","score":0.7790122032165527},{"id":"https://openalex.org/keywords/resilience","display_name":"Resilience (materials science)","score":0.7321034073829651},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5941153168678284},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5776284337043762},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12857064604759216},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.12147045135498047},{"id":"https://openalex.org/keywords/ecology","display_name":"Ecology","score":0.0838187038898468},{"id":"https://openalex.org/keywords/composite-material","display_name":"Composite material","score":0.07415801286697388}],"concepts":[{"id":"https://openalex.org/C2780389661","wikidata":"https://www.wikidata.org/wiki/Q1528875","display_name":"VIPeR","level":3,"score":0.7790122032165527},{"id":"https://openalex.org/C2779585090","wikidata":"https://www.wikidata.org/wiki/Q3457762","display_name":"Resilience (materials science)","level":2,"score":0.7321034073829651},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5941153168678284},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5776284337043762},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12857064604759216},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.12147045135498047},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0838187038898468},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.07415801286697388},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C2779448229","wikidata":"https://www.wikidata.org/wiki/Q3386847","display_name":"Venom","level":2,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3665283.3665300","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3665283.3665300","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/13","score":0.44999998807907104,"display_name":"Climate action"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1966460368","https://openalex.org/W1966573088","https://openalex.org/W1970296212","https://openalex.org/W1986026297","https://openalex.org/W2029541370","https://openalex.org/W2033549713","https://openalex.org/W2075137913","https://openalex.org/W2139637699","https://openalex.org/W2151614223","https://openalex.org/W2155316178","https://openalex.org/W2164340799","https://openalex.org/W2328615082","https://openalex.org/W2535860792","https://openalex.org/W2713385151","https://openalex.org/W2738078952","https://openalex.org/W2770762651","https://openalex.org/W2771269115","https://openalex.org/W2787585504","https://openalex.org/W2808255980","https://openalex.org/W2897505503","https://openalex.org/W2917241406","https://openalex.org/W2997871849","https://openalex.org/W3027559990","https://openalex.org/W3028955404","https://openalex.org/W3033033241","https://openalex.org/W3141147179","https://openalex.org/W3163275603","https://openalex.org/W3166559827","https://openalex.org/W3197603378","https://openalex.org/W4255353401","https://openalex.org/W4299397053","https://openalex.org/W4308659634","https://openalex.org/W4320526040","https://openalex.org/W4384833499"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2748952813","https://openalex.org/W15444843","https://openalex.org/W137568860","https://openalex.org/W2025448779","https://openalex.org/W4233990269","https://openalex.org/W2414993768","https://openalex.org/W2992074815","https://openalex.org/W4394258765","https://openalex.org/W3114349555"],"abstract_inverted_index":{"The":[0],"open":[1],"source":[2],"Verilog-to-Routing":[3],"(VTR)":[4],"tool":[5,30],"flow":[6],"can":[7,70,87,101],"produce":[8],"legal":[9],"placement":[10,84,163],"solutions":[11],"for":[12,22,74,149],"arbitrarily":[13],"complex":[14],"FPGA":[15],"architectures":[16],"and":[17,43,53,91,97,119,127,162,169],"is":[18,34,57,130],"thus":[19],"widely":[20],"used":[21],"novel":[23],"device":[24,40,76,115],"development":[25],"as":[26,28,94,103],"well":[27,104],"CAD":[29],"research.":[31],"VTR\u2019s":[32,112],"versatility":[33,90],"enabled":[35],"by":[36],"both":[37,89],"its":[38,44,117],"robust":[39],"modeling":[41],"capability":[42],"use":[45],"of":[46,82,125,134],"pre-placement":[47],"clustering":[48,161],"to":[49,107,111,142],"abstract":[50],"away":[51],"complexity":[52],"maintain":[54,88],"scalability.":[55],"Clustering":[56],"not":[58],"always":[59],"necessary;":[60],"recent":[61],"academic":[62],"tools":[63],"demonstrate":[64],"that":[65,129],"delaying":[66],"or":[67],"omitting":[68],"it":[69],"improve":[71],"result":[72,92],"quality":[73,93],"some":[75],"architectures.":[77],"By":[78],"incorporating":[79],"a":[80,123,146,157,167],"variety":[81],"external":[83,136],"tools,":[85],"VTR":[86,147],"FPGAs":[95],"scale":[96],"diversify.":[98],"Tool":[99],"developers":[100],"benefit":[102],"from":[105],"access":[106],"VTR;":[108],"however,":[109],"due":[110],"complex,":[113],"hierarchical":[114],"modeling,":[116],"place":[118],"route":[120],"interface":[121],"requires":[122],"level":[124],"detail":[126],"accuracy":[128],"beyond":[131],"the":[132,140],"scope":[133],"many":[135],"tools.":[137],"To":[138],"lower":[139],"barrier":[141],"interoperability,":[143],"we":[144],"introduce":[145],"Interface":[148],"Placement":[150],"with":[151],"Error":[152],"Resilience":[153],"(VIPER).":[154],"VIPER":[155],"constructs":[156],"complete,":[158],"legal,":[159],"VTR-compatible":[160],"solution":[164],"based":[165],"on":[166],"simplified":[168],"potentially":[170],"illegal":[171],"input":[172],"placement.":[173]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}