{"id":"https://openalex.org/W4399723195","doi":"https://doi.org/10.1145/3665283.3665298","title":"Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance","display_name":"Systolic Array-Based Many-Core Processor with Simultaneous Dual-Instruction Issuance","publication_year":2024,"publication_date":"2024-06-17","ids":{"openalex":"https://openalex.org/W4399723195","doi":"https://doi.org/10.1145/3665283.3665298"},"language":"en","primary_location":{"id":"doi:10.1145/3665283.3665298","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3665283.3665298","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033235279","display_name":"Yuxi Tan","orcid":null},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yuxi Tan","raw_affiliation_strings":["Graduate School of Science and Technology, University of Tsukuba, Japan"],"raw_orcid":"https://orcid.org/0009-0006-5171-7492","affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, University of Tsukuba, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102874689","display_name":"M. Nishimura","orcid":"https://orcid.org/0009-0002-1938-1774"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masaru Nishimura","raw_affiliation_strings":["Graduate School of Science and Technology, University of Tsukuba, Japan"],"raw_orcid":"https://orcid.org/0009-0002-1938-1774","affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, University of Tsukuba, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035433965","display_name":"Riadh Ben Abdelhamid","orcid":"https://orcid.org/0000-0001-8504-4739"},"institutions":[{"id":"https://openalex.org/I223822909","display_name":"Heidelberg University","ror":"https://ror.org/038t36y30","country_code":"DE","type":"education","lineage":["https://openalex.org/I223822909"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Riadh Ben Abdelhamid","raw_affiliation_strings":["The Institute for Computer Engineering, Heidelberg University, Germany"],"raw_orcid":"https://orcid.org/0000-0001-8504-4739","affiliations":[{"raw_affiliation_string":"The Institute for Computer Engineering, Heidelberg University, Germany","institution_ids":["https://openalex.org/I223822909"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020947887","display_name":"Bingjie Guo","orcid":"https://orcid.org/0009-0008-6006-6761"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Bingjie Guo","raw_affiliation_strings":["Graduate School of Science and Technology, University of Tsukuba, Japan"],"raw_orcid":"https://orcid.org/0009-0008-6006-6761","affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, University of Tsukuba, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005373452","display_name":"Qixiang Gao","orcid":"https://orcid.org/0009-0000-0907-7379"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Qixiang Gao","raw_affiliation_strings":["Graduate School of Science and Technology, University of Tsukuba, Japan"],"raw_orcid":"https://orcid.org/0009-0000-0907-7379","affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, University of Tsukuba, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060442383","display_name":"Yoshiki Yamaguchi","orcid":"https://orcid.org/0000-0001-9744-8271"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]},{"id":"https://openalex.org/I96036126","display_name":"Kumamoto University","ror":"https://ror.org/02cgss904","country_code":"JP","type":"education","lineage":["https://openalex.org/I96036126"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshiki Yamaguchi","raw_affiliation_strings":["Institute of Systems and Information Engineering, University of Tsukuba, Japan and Research and Education Institute for Semiconductors and Informatics, Kumamoto University, Japan"],"raw_orcid":"https://orcid.org/0000-0001-9744-8271","affiliations":[{"raw_affiliation_string":"Institute of Systems and Information Engineering, University of Tsukuba, Japan and Research and Education Institute for Semiconductors and Informatics, Kumamoto University, Japan","institution_ids":["https://openalex.org/I146399215","https://openalex.org/I96036126"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4514,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.48658029,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"119","last_page":"125"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.679607629776001},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.6502441167831421},{"id":"https://openalex.org/keywords/core","display_name":"Core (optical fiber)","score":0.512687087059021},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5009238719940186},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.40615034103393555},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3886517882347107},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3539891541004181},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33456674218177795},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12514814734458923}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.679607629776001},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.6502441167831421},{"id":"https://openalex.org/C2164484","wikidata":"https://www.wikidata.org/wiki/Q5170150","display_name":"Core (optical fiber)","level":2,"score":0.512687087059021},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5009238719940186},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.40615034103393555},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3886517882347107},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3539891541004181},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33456674218177795},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12514814734458923},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3665283.3665298","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3665283.3665298","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART 24))","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1622406298","display_name":"Next generation supercomputing based on multi-accelerating device technology","funder_award_id":"21H04869","funder_id":"https://openalex.org/F4320334764","funder_display_name":"Japan Society for the Promotion of Science"}],"funders":[{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1900969659","https://openalex.org/W1970815868","https://openalex.org/W2125979435","https://openalex.org/W2296385998","https://openalex.org/W2567482749","https://openalex.org/W2794424798","https://openalex.org/W2894590528","https://openalex.org/W3148394109","https://openalex.org/W3150704386","https://openalex.org/W3154811273","https://openalex.org/W4286001193"],"related_works":["https://openalex.org/W2128523353","https://openalex.org/W2291648581","https://openalex.org/W3158538495","https://openalex.org/W2107644726","https://openalex.org/W2406856881","https://openalex.org/W2011868109","https://openalex.org/W3041000698","https://openalex.org/W4401449716","https://openalex.org/W3023876411","https://openalex.org/W123152114"],"abstract_inverted_index":{"In":[0],"the":[1,12,94,111,126],"past":[2],"quarter-century,":[3],"many-core":[4],"processors":[5,27],"have":[6,68],"emerged":[7],"as":[8,60],"a":[9,87],"response":[10],"to":[11,18,38,71,101,124],"slowdown":[13],"of":[14,129],"Moore\u2019s":[15],"Law,":[16],"aiming":[17],"boost":[19],"computational":[20],"performance":[21],"and":[22,52,98],"energy":[23,127],"efficiency.":[24],"However,":[25],"these":[26,103],"face":[28],"challenges":[29],"in":[30],"efficiently":[31],"sharing":[32,82],"data":[33,81],"among":[34],"processing":[35,75],"elements":[36],"due":[37],"memory":[39],"access":[40],"constraints,":[41],"which":[42],"are":[43],"not":[44],"easily":[45],"addressed":[46],"by":[47,109],"conventional":[48],"Single-Instruction":[49,65],"Multiple-Data":[50,54,90],"(SIMD)":[51],"Multiple-Instruction,":[53],"(MIMD)":[55],"architectures.":[56,132],"New":[57],"approaches,":[58],"such":[59],"thread-based":[61],"execution":[62],"models":[63],"like":[64],"Multiple-Thread":[66],"(SIMT),":[67],"been":[69],"proposed":[70],"manage":[72],"massively":[73],"distributed":[74],"elements.":[76],"Nevertheless,":[77],"opportunities":[78],"for":[79],"enhancing":[80],"persist.":[83],"This":[84],"article":[85],"introduces":[86],"novel":[88],"Dual-Instruction":[89],"(DIMD)":[91],"architecture,":[92],"bridging":[93],"gap":[95],"between":[96],"SIMD":[97,131],"MIMD":[99],"architectures":[100],"tackle":[102],"challenges.":[104],"We":[105],"implement":[106],"this":[107],"architecture":[108],"extending":[110],"RISC-V":[112],"instruction":[113],"set.":[114],"Experimental":[115],"results":[116],"demonstrate":[117],"that":[118],"our":[119],"approach":[120],"can":[121],"achieve":[122],"up":[123],"double":[125],"efficiency":[128],"traditional":[130]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}