{"id":"https://openalex.org/W4408151386","doi":"https://doi.org/10.1145/3658617.3697758","title":"Efficient Hypergraph Modeling of VLSI Circuits for the MFS-Based Emulation and Simulation Acceleration","display_name":"Efficient Hypergraph Modeling of VLSI Circuits for the MFS-Based Emulation and Simulation Acceleration","publication_year":2025,"publication_date":"2025-01-20","ids":{"openalex":"https://openalex.org/W4408151386","doi":"https://doi.org/10.1145/3658617.3697758"},"language":"en","primary_location":{"id":"doi:10.1145/3658617.3697758","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3658617.3697758","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1145/3658617.3697758","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104037534","display_name":"Jiren Xu","orcid":"https://orcid.org/0009-0005-7149-4292"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jiahao Xu","raw_affiliation_strings":["Tsinghua Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032253165","display_name":"Chunyan Pei","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chunyan Pei","raw_affiliation_strings":["Tsinghua Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101319827","display_name":"Shengbo Tong","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shengbo Tong","raw_affiliation_strings":["Tsinghua Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053437305","display_name":"Wenjian Yu","orcid":"https://orcid.org/0000-0003-4897-7251"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenjian Yu","raw_affiliation_strings":["Tsinghua Univ., Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua Univ., Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5104037534"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.03773042,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1314","last_page":"1320"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.8695070147514343},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8210980892181396},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.7800318002700806},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.63559889793396},{"id":"https://openalex.org/keywords/hypergraph","display_name":"Hypergraph","score":0.5073432326316833},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44395142793655396},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4335657060146332},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.42297661304473877},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36363232135772705},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15754589438438416},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15219691395759583},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13757315278053284},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12443861365318298},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09725776314735413}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.8695070147514343},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8210980892181396},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.7800318002700806},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.63559889793396},{"id":"https://openalex.org/C2781221856","wikidata":"https://www.wikidata.org/wiki/Q840247","display_name":"Hypergraph","level":2,"score":0.5073432326316833},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44395142793655396},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4335657060146332},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.42297661304473877},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36363232135772705},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15754589438438416},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15219691395759583},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13757315278053284},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12443861365318298},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09725776314735413},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3658617.3697758","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3658617.3697758","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3658617.3697758","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3658617.3697758","pdf_url":null,"source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 30th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.699999988079071}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1966461475","https://openalex.org/W2050714971","https://openalex.org/W2078174680","https://openalex.org/W2109220922","https://openalex.org/W2136539269","https://openalex.org/W2153790296","https://openalex.org/W2164340799","https://openalex.org/W2997394943","https://openalex.org/W3139739636","https://openalex.org/W4226435553","https://openalex.org/W4236504040","https://openalex.org/W4240930970","https://openalex.org/W4241856644","https://openalex.org/W4309764772","https://openalex.org/W4312121098"],"related_works":["https://openalex.org/W2154523322","https://openalex.org/W2083200807","https://openalex.org/W4376608589","https://openalex.org/W1603137082","https://openalex.org/W2364195017","https://openalex.org/W1537073411","https://openalex.org/W1948107826","https://openalex.org/W2355430452","https://openalex.org/W3138003926","https://openalex.org/W1951195060"],"abstract_inverted_index":{"As":[0],"the":[1,11,26,46,51,104,109,116,119,123,128,133,139],"scale":[2],"of":[3,29,87,108,118,132],"integrated":[4],"circuit":[5,35,53],"(IC)":[6],"design":[7],"continues":[8],"to":[9,98,122],"expand,":[10],"multi-FPGA":[12],"system":[13],"(MFS)":[14],"is":[15,71,80,90],"widely":[16],"employed":[17],"for":[18,50,77],"logic":[19,30],"emulation":[20],"and":[21,65,106,127,138],"simulation":[22],"acceleration":[23,130],"which":[24],"ensures":[25],"functional":[27],"correctness":[28,107],"circuits.":[31],"During":[32],"this":[33,42],"process,":[34],"partitioning":[36],"becomes":[37],"a":[38,74],"dispensable":[39],"step.":[40],"In":[41],"work,":[43],"we":[44],"address":[45],"hypergraph":[47,88,125],"modeling":[48,79,89,142],"techniques":[49],"MFS-orientated":[52],"partitioning.":[54],"Firstly,":[55],"an":[56,84],"efficient":[57,85],"adaptive":[58,120,136],"flattening":[59,121,137],"algorithm":[60,76],"considering":[61],"multi-dimensional":[62],"resource":[63],"constraints":[64],"based":[66],"on":[67,93],"dynamic":[68],"programming":[69],"(DP)":[70],"proposed.":[72,81],"Then,":[73],"parallel":[75,140],"clock":[78,141],"With":[82],"them,":[83],"tool":[86],"developed.":[91],"Experiments":[92],"industrial":[94],"benchmarks":[95],"with":[96],"up":[97],"sixty":[99],"million":[100],"cells":[101],"have":[102],"validated":[103],"efficiency":[105],"proposed":[110,134],"techniques.":[111],"The":[112],"results":[113],"also":[114],"demonstrate":[115],"benefit":[117],"subsequent":[124],"partitioning,":[126],"significant":[129],"effects":[131],"DP-based":[135],"algorithms.":[143]},"counts_by_year":[],"updated_date":"2025-12-28T23:10:05.387466","created_date":"2025-10-10T00:00:00"}
