{"id":"https://openalex.org/W4399486726","doi":"https://doi.org/10.1145/3649476.3658737","title":"Enhanced Accelerator Design for Efficient CNN Processing with Improved Row-Stationary Dataflow","display_name":"Enhanced Accelerator Design for Efficient CNN Processing with Improved Row-Stationary Dataflow","publication_year":2024,"publication_date":"2024-06-10","ids":{"openalex":"https://openalex.org/W4399486726","doi":"https://doi.org/10.1145/3649476.3658737"},"language":"en","primary_location":{"id":"doi:10.1145/3649476.3658737","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3649476.3658737","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3649476.3658737?download=true","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2024","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3649476.3658737?download=true","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074661835","display_name":"Fabian Lesniak","orcid":"https://orcid.org/0000-0001-8302-6086"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Fabian Lesniak","raw_affiliation_strings":["Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany"],"raw_orcid":"https://orcid.org/0000-0001-8302-6086","affiliations":[{"raw_affiliation_string":"Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5099073593","display_name":"Annina Gutermann","orcid":"https://orcid.org/0009-0001-9917-8081"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Annina Gutermann","raw_affiliation_strings":["Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany"],"raw_orcid":"https://orcid.org/0009-0001-9917-8081","affiliations":[{"raw_affiliation_string":"Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053259767","display_name":"Tanja Harbaum","orcid":"https://orcid.org/0000-0001-7310-567X"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tanja Harbaum","raw_affiliation_strings":["Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany"],"raw_orcid":"https://orcid.org/0000-0001-7310-567X","affiliations":[{"raw_affiliation_string":"Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024739574","display_name":"J\u00fcrgen Becker","orcid":"https://orcid.org/0000-0002-5082-5487"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J\u00fcrgen Becker","raw_affiliation_strings":["Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany"],"raw_orcid":"https://orcid.org/0000-0002-5082-5487","affiliations":[{"raw_affiliation_string":"Institute of Information Processing Technology (ITIV), Karlsruhe Institute of Technology, Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":3.556,"has_fulltext":true,"cited_by_count":10,"citation_normalized_percentile":{"value":0.94195191,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"151","last_page":"157"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11689","display_name":"Adversarial Robustness in Machine Learning","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11689","display_name":"Adversarial Robustness in Machine Learning","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9586706161499023},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7643698453903198},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6153431534767151},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.49840617179870605},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.431942880153656},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32101064920425415}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9586706161499023},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7643698453903198},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6153431534767151},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.49840617179870605},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.431942880153656},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32101064920425415}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3649476.3658737","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3649476.3658737","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3649476.3658737?download=true","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2024","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3649476.3658737","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3649476.3658737","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3649476.3658737?download=true","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2024","raw_type":"proceedings-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6800000071525574}],"awards":[{"id":"https://openalex.org/G1851633167","display_name":null,"funder_award_id":"16ME0817","funder_id":"https://openalex.org/F4320323817","funder_display_name":"Universitas Brawijaya"}],"funders":[{"id":"https://openalex.org/F4320323817","display_name":"Universitas Brawijaya","ror":"https://ror.org/01wk3d929"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4399486726.pdf","grobid_xml":"https://content.openalex.org/works/W4399486726.grobid-xml"},"referenced_works_count":12,"referenced_works":["https://openalex.org/W2097117768","https://openalex.org/W2194775991","https://openalex.org/W2289252105","https://openalex.org/W2606722458","https://openalex.org/W2945146780","https://openalex.org/W2982083293","https://openalex.org/W3004127905","https://openalex.org/W3088659733","https://openalex.org/W3213528054","https://openalex.org/W4321498013","https://openalex.org/W4327519303","https://openalex.org/W4381050415"],"related_works":["https://openalex.org/W2564598376","https://openalex.org/W1484403103","https://openalex.org/W2584408851","https://openalex.org/W2115158825","https://openalex.org/W2101960124","https://openalex.org/W4377693460","https://openalex.org/W2783505431","https://openalex.org/W2033683327","https://openalex.org/W2521947294","https://openalex.org/W4236419692"],"abstract_inverted_index":{"Efficient":[0],"on-device":[1],"inference":[2],"of":[3,11,22,34,67,82,101,125,132,154,160,168,175,182],"convolutional":[4,173],"neural":[5,177],"networks":[6],"(CNNs)":[7],"is":[8,38,113,149],"becoming":[9],"one":[10],"the":[12,20,31,76,183,190],"key":[13],"challenges":[14],"for":[15,44,151,172],"embedded":[16],"systems,":[17],"leading":[18],"to":[19,30,40,48,170],"integration":[21],"specialized":[23],"hardware":[24],"accelerators":[25,43,84],"in":[26,60],"System-on-Chips":[27],"(SoCs).":[28],"Due":[29],"memory-bound":[32],"nature":[33],"convolution":[35],"workloads,":[36],"it":[37],"essential":[39],"optimize":[41],"CNN":[42,61,103],"maximum":[45],"data":[46,58],"re-use":[47,59],"reduce":[49],"memory":[50],"bandwidth":[51],"requirements.":[52],"The":[53,108],"row-stationary":[54],"(RS)":[55],"dataflow":[56,147],"enhances":[57],"processing":[62,153],"by":[63],"storing":[64],"a":[65,102,118,157,165],"subset":[66],"input":[68],"activations,":[69],"weights":[70],"and":[71,89,136],"partial":[72],"sums":[73],"locally":[74],"within":[75],"Processing":[77],"Elements":[78],"(PEs).":[79],"However,":[80],"designs":[81],"RS":[83,106],"are":[85],"not":[86],"publicly":[87],"available,":[88],"many":[90],"implementation":[91,100],"details":[92],"remain":[93],"undisclosed.":[94],"This":[95],"paper":[96],"introduces":[97],"an":[98,130,145],"open-source":[99],"accelerator":[104,184],"with":[105,156],"dataflow.":[107],"complete":[109],"VHDL":[110],"source":[111],"code":[112],"provided":[114],"as":[115,117],"well":[116],"simulation":[119],"environment":[120],"that":[121,148],"enables":[122],"in-depth":[123],"analysis":[124],"different":[126],"workloads.":[127],"We":[128],"contribute":[129],"exploration":[131],"various":[133],"design":[134],"parameters":[135],"evaluate":[137],"their":[138],"impact":[139],"on":[140,189],"performance.":[141],"Furthermore,":[142],"we":[143],"present":[144],"enhanced":[146],"optimized":[150],"parallel":[152],"convolutions":[155],"high":[158],"number":[159],"channels.":[161],"Our":[162],"optimizations":[163],"yield":[164],"performance":[166],"improvement":[167],"up":[169],"2.3x":[171],"layers":[174],"common":[176],"networks.":[178],"An":[179],"FPGA":[180],"prototype":[181],"design,":[185],"featuring":[186],"70":[187],"PEs":[188],"Xilinx":[191],"UltraScale+":[192],"ZCU104":[193],"platform,":[194],"achieves":[195],"4.012":[196],"GOPS":[197],"at":[198],"100":[199],"MHz.":[200]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":7}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}