{"id":"https://openalex.org/W4392521852","doi":"https://doi.org/10.1145/3642921.3642926","title":"Integration of RISC-V Page Table Walk in gem5 SE Mode","display_name":"Integration of RISC-V Page Table Walk in gem5 SE Mode","publication_year":2024,"publication_date":"2024-01-18","ids":{"openalex":"https://openalex.org/W4392521852","doi":"https://doi.org/10.1145/3642921.3642926"},"language":"en","primary_location":{"id":"doi:10.1145/3642921.3642926","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3642921.3642926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004350640","display_name":"Mirco Mannino","orcid":"https://orcid.org/0000-0003-1660-3984"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Mirco Mannino","raw_affiliation_strings":["University of Siena, Italy"],"raw_orcid":"https://orcid.org/0000-0003-1660-3984","affiliations":[{"raw_affiliation_string":"University of Siena, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017693426","display_name":"Yinting Huang","orcid":"https://orcid.org/0009-0009-5142-5715"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Yinting Huang","raw_affiliation_strings":["Imperial College London, United Kingdom"],"raw_orcid":"https://orcid.org/0009-0009-5142-5715","affiliations":[{"raw_affiliation_string":"Imperial College London, United Kingdom","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021283515","display_name":"Biagio Peccerillo","orcid":"https://orcid.org/0000-0002-4998-0092"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Biagio Peccerillo","raw_affiliation_strings":["University of Siena, Italy"],"raw_orcid":"https://orcid.org/0000-0002-4998-0092","affiliations":[{"raw_affiliation_string":"University of Siena, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092266093","display_name":"Alessio Medaglini","orcid":"https://orcid.org/0000-0002-7572-6733"},"institutions":[{"id":"https://openalex.org/I102064193","display_name":"University of Siena","ror":"https://ror.org/01tevnk56","country_code":"IT","type":"education","lineage":["https://openalex.org/I102064193"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessio Medaglini","raw_affiliation_strings":["University of Siena, Italy"],"raw_orcid":"https://orcid.org/0000-0002-7572-6733","affiliations":[{"raw_affiliation_string":"University of Siena, Italy","institution_ids":["https://openalex.org/I102064193"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047011963","display_name":"Sandro Bartolini","orcid":"https://orcid.org/0000-0002-7975-3632"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Sandro Bartolini","raw_affiliation_strings":["Univerisity of Siena, Italy"],"raw_orcid":"https://orcid.org/0000-0002-7975-3632","affiliations":[{"raw_affiliation_string":"Univerisity of Siena, Italy","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5004350640"],"corresponding_institution_ids":["https://openalex.org/I102064193"],"apc_list":null,"apc_paid":null,"fwci":1.4231,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.79153703,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"22","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9890999794006348,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9886000156402588,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6946874856948853},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6123721599578857},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.5863283276557922},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.47286176681518555},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4556695222854614},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3066592812538147},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.20641747117042542},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.16562974452972412}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6946874856948853},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6123721599578857},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.5863283276557922},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.47286176681518555},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4556695222854614},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3066592812538147},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.20641747117042542},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.16562974452972412}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3642921.3642926","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3642921.3642926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 16th Workshop on Rapid Simulation and Performance Evaluation for Design","raw_type":"proceedings-article"},{"id":"pmh:oai:usiena-air.unisi.it:11365/1257034","is_oa":false,"landing_page_url":"https://hdl.handle.net/11365/1257034","pdf_url":null,"source":{"id":"https://openalex.org/S4377196319","display_name":"Use Siena air (University of Siena)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I102064193","host_organization_name":"University of Siena","host_organization_lineage":["https://openalex.org/I102064193"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6200000047683716,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2049403384","https://openalex.org/W3152703111","https://openalex.org/W4243579559","https://openalex.org/W4385585295","https://openalex.org/W4392521852","https://openalex.org/W6779824479"],"related_works":["https://openalex.org/W2948670949","https://openalex.org/W4288047943","https://openalex.org/W2418291489","https://openalex.org/W1797990060","https://openalex.org/W4232484699","https://openalex.org/W2473636215","https://openalex.org/W4242025311","https://openalex.org/W2990655940","https://openalex.org/W2478535484","https://openalex.org/W1590279850"],"abstract_inverted_index":{"gem5":[0,88],"is":[1,56,94],"a":[2,30,69,100,118],"popular":[3],"architectural":[4],"simulator,":[5],"for":[6,147],"both":[7],"academic":[8],"and":[9,22,163,183],"industrial":[10],"researchers.":[11],"It":[12],"can":[13],"be":[14],"used":[15],"in":[16,72,143],"two":[17],"configurations:":[18],"Full":[19],"System":[20],"mode":[21,146],"Syscall":[23,73,144],"Emulation":[24,74,145],"mode.":[25],"The":[26],"former":[27],"requires":[28],"running":[29],"real":[31,119],"kernel":[32,71],"to":[33,59,65,181,188],"achieve":[34],"realistic":[35],"results,":[36],"at":[37],"the":[38,46,66,76,86,91,97,106,115,124,139,148,158,168,186],"cost":[39],"of":[40,68,79,99,117,138,160],"increased":[41],"user":[42],"effort.":[43],"In":[44,85,131],"contrast,":[45],"latter":[47],"emulates":[48],"operating":[49],"system":[50],"functionalities,":[51],"which":[52],"improves":[53],"usability":[54],"but":[55],"more":[57],"prone":[58],"producing":[60],"less":[61],"accurate":[62],"results.":[63],"Due":[64],"absence":[67],"genuine":[70],"mode,":[75],"simulator":[77],"model":[78,187],"virtual":[80],"address":[81,92],"translation":[82,93],"remains":[83],"inaccurate.":[84],"current":[87],"version":[89],"(v23.0.1.0),":[90],"performed":[95],"through":[96],"lookup":[98],"flat":[101],"structure":[102],"that":[103],"stores":[104],"all":[105],"virtual-to-physical":[107],"mappings.":[108],"However,":[109],"this":[110,132],"approach":[111],"does":[112],"not":[113],"reflect":[114],"behaviour":[116],"multi-level":[120],"page":[121,129,140,155],"table,":[122],"lacking":[123],"additional":[125],"latency":[126],"associated":[127],"with":[128],"walks.":[130],"paper,":[133],"we":[134,172],"present":[135],"our":[136,154,174],"implementation":[137],"walk":[141],"functionality":[142],"RISC-V":[149],"ISA.":[150],"We":[151],"show":[152],"how":[153],"walker":[156],"affects":[157],"performance":[159],"simulated":[161],"benchmarks":[162],"also":[164],"its":[165],"sensitivity":[166],"on":[167],"TLB":[169],"size.":[170],"Furthermore,":[171],"make":[173],"work":[175],"publicly":[176],"available,":[177],"inviting":[178],"fellow":[179],"researchers":[180],"utilize":[182],"build":[184],"upon":[185],"suit":[189],"their":[190],"specific":[191],"requirements.":[192]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}