{"id":"https://openalex.org/W4399659750","doi":"https://doi.org/10.1145/3641584.3641723","title":"A Multi-Precision Floating-Point Multiplier Structure Applied to FPGA Embedded DSP","display_name":"A Multi-Precision Floating-Point Multiplier Structure Applied to FPGA Embedded DSP","publication_year":2023,"publication_date":"2023-09-22","ids":{"openalex":"https://openalex.org/W4399659750","doi":"https://doi.org/10.1145/3641584.3641723"},"language":"en","primary_location":{"id":"doi:10.1145/3641584.3641723","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3641584.3641723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 6th International Conference on Artificial Intelligence and Pattern Recognition (AIPR)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066553852","display_name":"Yuehang Li","orcid":"https://orcid.org/0000-0003-3816-824X"},"institutions":[{"id":"https://openalex.org/I4210136859","display_name":"Xi\u2019an University of Posts and Telecommunications","ror":"https://ror.org/04jn0td46","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210136859"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yuehang Li","raw_affiliation_strings":["School of Communications and Information Engineering & School of Artificial Intelligence, Xi?an University of Posts & Telecommunications, China"],"raw_orcid":"https://orcid.org/0000-0003-3816-824X","affiliations":[{"raw_affiliation_string":"School of Communications and Information Engineering & School of Artificial Intelligence, Xi?an University of Posts & Telecommunications, China","institution_ids":["https://openalex.org/I4210136859"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102845279","display_name":"Zhihong Huang","orcid":"https://orcid.org/0000-0002-4235-2587"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210137199","display_name":"Aerospace Information Research Institute","ror":"https://ror.org/0419fj215","country_code":"CN","type":"education","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210137199"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhihong Huang","raw_affiliation_strings":["Ehiway Microelectronic Science and Technology, China and \rAerospace Information Research Institute,Chinese Academy of Sciences, China"],"raw_orcid":"https://orcid.org/0000-0002-4235-2587","affiliations":[{"raw_affiliation_string":"Ehiway Microelectronic Science and Technology, China and \rAerospace Information Research Institute,Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210137199","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101639232","display_name":"Gang Cai","orcid":"https://orcid.org/0000-0002-9296-0775"},"institutions":[{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"government","lineage":["https://openalex.org/I19820366"]},{"id":"https://openalex.org/I4210137199","display_name":"Aerospace Information Research Institute","ror":"https://ror.org/0419fj215","country_code":"CN","type":"education","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210137199"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Gang Cai","raw_affiliation_strings":["Ehiway Microelectronic Science and Technology, China and \rAerospace Information Research Institute,Chinese Academy of Sciences, China"],"raw_orcid":"https://orcid.org/0000-0002-9296-0775","affiliations":[{"raw_affiliation_string":"Ehiway Microelectronic Science and Technology, China and \rAerospace Information Research Institute,Chinese Academy of Sciences, China","institution_ids":["https://openalex.org/I4210137199","https://openalex.org/I19820366"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016490930","display_name":"Rui Chen","orcid":"https://orcid.org/0000-0001-5292-3374"},"institutions":[{"id":"https://openalex.org/I4210136859","display_name":"Xi\u2019an University of Posts and Telecommunications","ror":"https://ror.org/04jn0td46","country_code":"CN","type":"education","lineage":["https://openalex.org/I4210136859"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Rui Chen","raw_affiliation_strings":["School of Communications and Information Engineering & School of Artificial Intelligence, Xi?an University of Posts & Telecommunications, China"],"raw_orcid":"https://orcid.org/0000-0001-5292-3374","affiliations":[{"raw_affiliation_string":"School of Communications and Information Engineering & School of Artificial Intelligence, Xi?an University of Posts & Telecommunications, China","institution_ids":["https://openalex.org/I4210136859"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5066553852"],"corresponding_institution_ids":["https://openalex.org/I4210136859"],"apc_list":null,"apc_paid":null,"fwci":0.194,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.60003983,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"932","last_page":"939"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7694922685623169},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7485944628715515},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.6339079141616821},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6168386936187744},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5889133810997009},{"id":"https://openalex.org/keywords/single-precision-floating-point-format","display_name":"Single-precision floating-point format","score":0.5372206568717957},{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.44459208846092224},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4121532440185547},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3974788188934326},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.10797971487045288}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7694922685623169},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7485944628715515},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.6339079141616821},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6168386936187744},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5889133810997009},{"id":"https://openalex.org/C133095886","wikidata":"https://www.wikidata.org/wiki/Q1307173","display_name":"Single-precision floating-point format","level":3,"score":0.5372206568717957},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.44459208846092224},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4121532440185547},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3974788188934326},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.10797971487045288},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3641584.3641723","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3641584.3641723","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 6th International Conference on Artificial Intelligence and Pattern Recognition (AIPR)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7300000190734863}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W2004166680","https://openalex.org/W2116281088","https://openalex.org/W2803200748","https://openalex.org/W2912099576","https://openalex.org/W2914973130","https://openalex.org/W3010923796","https://openalex.org/W4220714955","https://openalex.org/W4225568005","https://openalex.org/W4285055485","https://openalex.org/W4312872667","https://openalex.org/W4322624371"],"related_works":["https://openalex.org/W3150370983","https://openalex.org/W2239119680","https://openalex.org/W1564887326","https://openalex.org/W3215589575","https://openalex.org/W2116803521","https://openalex.org/W3150959508","https://openalex.org/W1571090276","https://openalex.org/W2773283032","https://openalex.org/W1973800584","https://openalex.org/W2185760795"],"abstract_inverted_index":{"Embedded":[0],"floating-point":[1,6,58,91,154,161,167,196,200,220,228,237],"DSP":[2,51],"hardcore,":[3],"as":[4],"a":[5,54,73,134,139,198,203],"arithmetic":[7,69],"unit":[8,70],"in":[9,14,31,45,67,99,113,127],"FPGA,":[10],"is":[11,120],"widely":[12],"used":[13],"the":[15,27,39,48,64,68,104,114,118,149,157,171,174,183,193,208,211,218,226,235],"fields":[16,33,44],"of":[17,42,56,78,117,124,151,159],"image":[18],"processing,":[19,21],"signal":[20],"deep":[22],"learning":[23],"acceleration,":[24],"etc.,":[25],"while":[26],"requirements":[28],"for":[29],"accuracy":[30,57,90,111],"different":[32,46,110],"are":[34,97],"different.In":[35],"order":[36],"to":[37,163],"support":[38,164],"computing":[40,221,229,238],"needs":[41],"many":[43],"accuracy,":[47],"mainstream":[49],"embedded":[50],"currently":[52],"supports":[53,85],"variety":[55],"or":[59,92],"fixed-point":[60,93],"number":[61],"arithmetic;":[62],"and":[63,202,234],"multiplier":[65,119,141,162],"structure":[66,84,142,158],"mainly":[71],"adopts":[72],"recursive":[74,204,209],"multiplicer":[75],"instruments":[76],"stitching":[77],"multiple":[79,82,89,165],"small":[80],"wide":[81],"instruments,this":[83],"multiplication":[86,168],"operations":[87],"with":[88,207],"numbers.":[94],"However,":[95],"there":[96],"defects":[98],"this":[100,131],"structure,":[101],"that":[102,146,173],"is,":[103],"hardware":[105,125,175],"resource":[106],"sharing":[107],"occupied":[108],"by":[109,216,224,232,241],"data":[112,135],"internal":[115],"operation":[116],"low,":[121],"thereby":[122],"waste":[123],"resources":[126,176],"chip":[128],"resources.":[129],"Therefore,":[130],"article":[132],"proposes":[133],"segmentation/packaging":[136],"method,":[137],"designed":[138],"multi-precision":[140,144],"(compact":[143],"multiplier)":[145],"improved":[147],"on":[148],"basis":[150],"traditional":[152,194],"dual-precision":[153,195,236],"multiplier.":[155,205],"Use":[156],"high-precision":[160],"low-precision":[166],"operations,It":[169],"solves":[170],"problem":[172],"occupy":[177],"too":[178],"much.":[179],"The":[180],"experiment":[181],"uses":[182],"SMIC":[184],"14nm":[185],"standard":[186],"CMOS":[187],"process":[188],"design;":[189],"compares":[190],"it":[191],"through":[192],"multiplier,":[197,201,210],"separate":[199],"Compared":[206],"design":[212],"area":[213],"was":[214],"reduced":[215],"43.16%,":[217],"half-precision":[219],"performance":[222,230,239],"increased":[223,231,240],"15.39%,":[225],"single-precision":[227],"12.07%,":[233],"32.4%.":[242]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}