{"id":"https://openalex.org/W4394586834","doi":"https://doi.org/10.1145/3631882.3631905","title":"MC-ELMM: Multi-Chip Endurance-Limited Memory Management","display_name":"MC-ELMM: Multi-Chip Endurance-Limited Memory Management","publication_year":2023,"publication_date":"2023-10-02","ids":{"openalex":"https://openalex.org/W4394586834","doi":"https://doi.org/10.1145/3631882.3631905"},"language":"en","primary_location":{"id":"doi:10.1145/3631882.3631905","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631905","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631905","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631905","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5008993086","display_name":"Andrew Bartolo","orcid":"https://orcid.org/0009-0005-9860-7904"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew M. Bartolo","raw_affiliation_strings":["Computer Science, Stanford University, USA"],"raw_orcid":"https://orcid.org/0009-0005-9860-7904","affiliations":[{"raw_affiliation_string":"Computer Science, Stanford University, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011667950","display_name":"Mohamed M. Sabry Aly","orcid":"https://orcid.org/0000-0002-8018-1264"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Mohamed M. Sabry Aly","raw_affiliation_strings":["Computer Science and Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0002-8018-1264","affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038069067","display_name":"George Michelogiannakis","orcid":"https://orcid.org/0000-0003-3743-6054"},"institutions":[{"id":"https://openalex.org/I148283060","display_name":"Lawrence Berkeley National Laboratory","ror":"https://ror.org/02jbv0t02","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I148283060","https://openalex.org/I39565521"]},{"id":"https://openalex.org/I4210131439","display_name":"Applied Mathematics (United States)","ror":"https://ror.org/03seew607","country_code":"US","type":"company","lineage":["https://openalex.org/I4210131439"]},{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"George Michelogiannakis","raw_affiliation_strings":["Electrical Engineering, Stanford University, USA and Applied Mathematics and Computational Research, Lawrence Berkeley National Laboratory, USA"],"raw_orcid":"https://orcid.org/0000-0003-3743-6054","affiliations":[{"raw_affiliation_string":"Electrical Engineering, Stanford University, USA and Applied Mathematics and Computational Research, Lawrence Berkeley National Laboratory, USA","institution_ids":["https://openalex.org/I148283060","https://openalex.org/I4210131439","https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036312663","display_name":"Subhasish Mitra","orcid":"https://orcid.org/0000-0002-5572-5194"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhasish Mitra","raw_affiliation_strings":["Electrical Engineering, Computer Science, Stanford University, USA"],"raw_orcid":"https://orcid.org/0000-0002-5572-5194","affiliations":[{"raw_affiliation_string":"Electrical Engineering, Computer Science, Stanford University, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.25076283,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"16"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7964024543762207},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6116429567337036},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6092700958251953},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5715837478637695},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5071296691894531},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4897325038909912},{"id":"https://openalex.org/keywords/write-buffer","display_name":"Write buffer","score":0.4608328938484192},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.43131518363952637},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.4110344648361206},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3469187021255493},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.23904094099998474},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23846790194511414},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.160192608833313},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.09522765874862671}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7964024543762207},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6116429567337036},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6092700958251953},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5715837478637695},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5071296691894531},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4897325038909912},{"id":"https://openalex.org/C89089495","wikidata":"https://www.wikidata.org/wiki/Q8038418","display_name":"Write buffer","level":5,"score":0.4608328938484192},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.43131518363952637},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.4110344648361206},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3469187021255493},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.23904094099998474},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23846790194511414},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.160192608833313},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.09522765874862671},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3631882.3631905","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631905","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631905","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3631882.3631905","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631905","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631905","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306078","display_name":"U.S. Department of Defense","ror":"https://ror.org/0447fe631"},{"id":"https://openalex.org/F4320306084","display_name":"U.S. Department of Energy","ror":"https://ror.org/01bj3aw27"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"},{"id":"https://openalex.org/F4320332815","display_name":"Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4394586834.pdf","grobid_xml":"https://content.openalex.org/works/W4394586834.grobid-xml"},"referenced_works_count":105,"referenced_works":["https://openalex.org/W112356807","https://openalex.org/W1482680420","https://openalex.org/W1653864426","https://openalex.org/W1964604818","https://openalex.org/W1976793531","https://openalex.org/W1979527452","https://openalex.org/W1980648539","https://openalex.org/W1982381157","https://openalex.org/W1985263063","https://openalex.org/W2000041758","https://openalex.org/W2001461406","https://openalex.org/W2002555321","https://openalex.org/W2003793831","https://openalex.org/W2007962663","https://openalex.org/W2009993946","https://openalex.org/W2010370581","https://openalex.org/W2011197827","https://openalex.org/W2018384083","https://openalex.org/W2044355432","https://openalex.org/W2046574526","https://openalex.org/W2047427636","https://openalex.org/W2048588974","https://openalex.org/W2049986441","https://openalex.org/W2053291274","https://openalex.org/W2061367020","https://openalex.org/W2062604069","https://openalex.org/W2063923758","https://openalex.org/W2064675550","https://openalex.org/W2070938449","https://openalex.org/W2071421592","https://openalex.org/W2076217257","https://openalex.org/W2078787346","https://openalex.org/W2078994750","https://openalex.org/W2080592089","https://openalex.org/W2081597309","https://openalex.org/W2082982763","https://openalex.org/W2086716781","https://openalex.org/W2097797648","https://openalex.org/W2097823832","https://openalex.org/W2097872435","https://openalex.org/W2102449048","https://openalex.org/W2104101584","https://openalex.org/W2104105007","https://openalex.org/W2104305170","https://openalex.org/W2104807822","https://openalex.org/W2107400562","https://openalex.org/W2112753327","https://openalex.org/W2113235308","https://openalex.org/W2129166894","https://openalex.org/W2130657217","https://openalex.org/W2135393827","https://openalex.org/W2146591355","https://openalex.org/W2147539449","https://openalex.org/W2157802978","https://openalex.org/W2161092827","https://openalex.org/W2169865228","https://openalex.org/W2171653118","https://openalex.org/W2194775991","https://openalex.org/W2209394967","https://openalex.org/W2273440736","https://openalex.org/W2294047952","https://openalex.org/W2432978112","https://openalex.org/W2623341950","https://openalex.org/W2624005633","https://openalex.org/W2761774513","https://openalex.org/W2765571703","https://openalex.org/W2779253217","https://openalex.org/W2796645376","https://openalex.org/W2798565778","https://openalex.org/W2808289463","https://openalex.org/W2883873167","https://openalex.org/W2904216795","https://openalex.org/W2907239730","https://openalex.org/W2907563276","https://openalex.org/W2907909057","https://openalex.org/W2912918068","https://openalex.org/W2914250845","https://openalex.org/W2914754358","https://openalex.org/W2944895246","https://openalex.org/W2945550132","https://openalex.org/W2953072311","https://openalex.org/W2963989532","https://openalex.org/W2971029583","https://openalex.org/W2982726777","https://openalex.org/W3014802144","https://openalex.org/W3016147292","https://openalex.org/W3043780027","https://openalex.org/W3102510044","https://openalex.org/W3119921680","https://openalex.org/W3139448463","https://openalex.org/W3139689176","https://openalex.org/W3185867486","https://openalex.org/W3186844435","https://openalex.org/W4210363011","https://openalex.org/W4221032407","https://openalex.org/W4230560934","https://openalex.org/W4234463937","https://openalex.org/W4237131533","https://openalex.org/W4237229330","https://openalex.org/W4238087298","https://openalex.org/W4241721528","https://openalex.org/W4242157440","https://openalex.org/W4244361616","https://openalex.org/W4248195866","https://openalex.org/W4249654426"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W2098207691","https://openalex.org/W3148568549","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W2269474412","https://openalex.org/W4386903460","https://openalex.org/W4211178602","https://openalex.org/W2433923775","https://openalex.org/W2537599394"],"abstract_inverted_index":{"Non-volatile":[0],"memories":[1,91],"(NVMs)":[2],"have":[3,65],"become":[4],"a":[5,77,85,175,181,188,196,203],"staple":[6],"of":[7,178,184,198],"architectural":[8],"research.":[9],"NVMs":[10],"naturally":[11],"enable":[12],"techniques":[13],"such":[14],"as":[15],"crash":[16],"consistency;":[17],"persistent":[18],"snapshots,":[19],"logs,":[20],"and":[21,25,206],"heaps;":[22],"security-enhanced":[23],"memories;":[24],"even":[26],"near-":[27],"or":[28,140],"in-memory":[29],"processing.":[30],"However,":[31,62],"all":[32],"current":[33],"NVM":[34],"technologies":[35],"suffer":[36],"from":[37,97],"limited":[38],"write":[39],"endurance.":[40],"Monolithic":[41],"3D":[42],"integration":[43],"(M3D),":[44],"an":[45],"NVM-enabled,":[46],"near-memory":[47],"technique,":[48],"drastically":[49],"increases":[50,168],"compute-to-memory":[51],"connectivity,":[52],"improving":[53,151],"the":[54],"energy-delay":[55],"product":[56],"(EDP),":[57],"especially":[58],"for":[59,89,124,129],"data-intensive":[60],"workloads.":[61],"M3D":[63,69,117,130],"systems":[64,126],"another":[66],"constraint:":[67],"scaling":[68],"memory":[70],"capacity":[71],"adds":[72],"multiple":[73,116,161],"compute-plus-memory":[74],"chips":[75],"in":[76],"NUMA":[78,122,146,162],"arrangement.":[79],"In":[80],"response,":[81],"we":[82,110,191],"first":[83],"develop":[84],"lifetime":[86,96,169,194],"extension":[87],"mechanism":[88],"endurance-limited":[90],"(ELMs)":[92],"that":[93,121],"extends":[94],"chip":[95],"mere":[98],"minutes":[99],"to":[100,115],"several":[101],"years.":[102],"Our":[103,143],"page-based":[104],"scheme":[105,114,167,173],"minimizes":[106],"execution":[107],"disruption.":[108],"Second,":[109],"extend":[111],"our":[112,165,171],"single-chip":[113,172],"chips.":[118],"We":[119],"show":[120],"policies":[123],"DRAM":[125],"are":[127],"ill-suited":[128],"because":[131],"they":[132],"either":[133],"incur":[134],"too":[135],"many":[136],"costly":[137],"off-chip":[138],"accesses":[139],"sacrifice":[141],"lifetime.":[142,154],"technique":[144],"preserves":[145],"locality":[147],"benefits":[148],"while":[149],"significantly":[150],"overall":[152],"system":[153],"For":[155,180],"homogeneous":[156],"multi-threaded":[157],"workloads":[158,185],"running":[159,186],"across":[160],"nodes":[163],"(chips),":[164],"multi-chip":[166],"over":[170],"by":[174,195,202],"geometric":[176],"mean":[177],"48%.":[179],"heterogeneous":[182],"mixture":[183],"on":[187],"multi-monolithic-chip":[189],"cluster,":[190],"increase":[192],"cluster":[193],"factor":[197],"4.7":[199],"\u00d7,":[200],"bounded":[201],"6%":[204,207],"energy":[205],"runtime":[208,213],"overhead":[209,214],"(commonly":[210],"with":[211],"no":[212],"at":[215],"all).":[216]},"counts_by_year":[],"updated_date":"2026-07-30T17:31:21.811387","created_date":"2025-10-10T00:00:00"}
