{"id":"https://openalex.org/W4394566278","doi":"https://doi.org/10.1145/3631882.3631892","title":"E=MC^2: Efficient Mobility Centric Caching","display_name":"E=MC^2: Efficient Mobility Centric Caching","publication_year":2023,"publication_date":"2023-10-02","ids":{"openalex":"https://openalex.org/W4394566278","doi":"https://doi.org/10.1145/3631882.3631892"},"language":"en","primary_location":{"id":"doi:10.1145/3631882.3631892","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631892","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631892","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631892","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002777604","display_name":"Chen Ding","orcid":"https://orcid.org/0000-0003-4968-6659"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chen Ding","raw_affiliation_strings":["University of Rochester, USA"],"raw_orcid":"https://orcid.org/0000-0003-4968-6659","affiliations":[{"raw_affiliation_string":"University of Rochester, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064652745","display_name":"Benjamin Reber","orcid":"https://orcid.org/0000-0003-1633-397X"},"institutions":[{"id":"https://openalex.org/I5388228","display_name":"University of Rochester","ror":"https://ror.org/022kthw22","country_code":"US","type":"education","lineage":["https://openalex.org/I5388228"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ben Reber","raw_affiliation_strings":["University of Rochester, USA"],"raw_orcid":"https://orcid.org/0000-0003-1633-397X","affiliations":[{"raw_affiliation_string":"University of Rochester, USA","institution_ids":["https://openalex.org/I5388228"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043863217","display_name":"Dorin Patru","orcid":"https://orcid.org/0009-0008-5671-9061"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dorin Patru","raw_affiliation_strings":["Rochester Institute of Technology, USA"],"raw_orcid":"https://orcid.org/0009-0008-5671-9061","affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092059761","display_name":"Alexander H. Kneipp","orcid":"https://orcid.org/0009-0008-7063-9009"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Alexander H. Kneipp","raw_affiliation_strings":["Rochester Institute of Technology, USA"],"raw_orcid":"https://orcid.org/0009-0008-7063-9009","affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, USA","institution_ids":["https://openalex.org/I155173764"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5095039317","display_name":"Marcus Figorito","orcid":"https://orcid.org/0009-0004-2214-9129"},"institutions":[{"id":"https://openalex.org/I155173764","display_name":"Rochester Institute of Technology","ror":"https://ror.org/00v4yb702","country_code":"US","type":"education","lineage":["https://openalex.org/I155173764"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marcus Figorito","raw_affiliation_strings":["Rochester Institute of Technology, USA"],"raw_orcid":"https://orcid.org/0009-0004-2214-9129","affiliations":[{"raw_affiliation_string":"Rochester Institute of Technology, USA","institution_ids":["https://openalex.org/I155173764"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5002777604"],"corresponding_institution_ids":["https://openalex.org/I5388228"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.23879915,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11478","display_name":"Caching and Content Delivery","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8458479642868042},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8175326585769653},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.7522655725479126},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.634662926197052},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.6196655035018921},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.6170268654823303},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.5949185490608215},{"id":"https://openalex.org/keywords/memory-hierarchy","display_name":"Memory hierarchy","score":0.5431638360023499},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4842959940433502},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.47492772340774536},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4727143943309784},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.45878392457962036},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44112488627433777},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.43732383847236633},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40060898661613464},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.34891459345817566}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8458479642868042},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8175326585769653},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.7522655725479126},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.634662926197052},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6196655035018921},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.6170268654823303},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.5949185490608215},{"id":"https://openalex.org/C2778100165","wikidata":"https://www.wikidata.org/wiki/Q1589327","display_name":"Memory hierarchy","level":3,"score":0.5431638360023499},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4842959940433502},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.47492772340774536},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4727143943309784},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.45878392457962036},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44112488627433777},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.43732383847236633},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40060898661613464},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.34891459345817566}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3631882.3631892","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631892","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631892","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3631882.3631892","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3631882.3631892","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3631882.3631892","source":{"id":"https://openalex.org/S4306524191","display_name":"Proceedings of the International Symposium on Memory Systems","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Symposium on Memory Systems","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.8700000047683716,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G1222035347","display_name":"Collaborative Research: SHF: Small: Programmable Hierarchical Caches: Design, Programming, and Prototyping","funder_award_id":"2114285","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G2483447800","display_name":"Collaborative Research: SHF: Small: Programmable Hierarchical Caches: Design, Programming, and Prototyping","funder_award_id":"2114319","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G544617644","display_name":"SHF: Small: Data Movement Complexity: Theory and Optimization","funder_award_id":"2217395","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G659336895","display_name":null,"funder_award_id":"CCF-2217395, CCF-2114319, CNS-1909099","funder_id":"https://openalex.org/F4320323817","funder_display_name":"Universitas Brawijaya"},{"id":"https://openalex.org/G8348329754","display_name":"CNS Core:Small: Prescriptive Software Caching Using Leases","funder_award_id":"1909099","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320310246","display_name":"University of Rochester","ror":"https://ror.org/022kthw22"},{"id":"https://openalex.org/F4320323817","display_name":"Universitas Brawijaya","ror":"https://ror.org/01wk3d929"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4394566278.pdf","grobid_xml":"https://content.openalex.org/works/W4394566278.grobid-xml"},"referenced_works_count":21,"referenced_works":["https://openalex.org/W1985687326","https://openalex.org/W2012481411","https://openalex.org/W2043557409","https://openalex.org/W2066511571","https://openalex.org/W2116986122","https://openalex.org/W2124350608","https://openalex.org/W2144941482","https://openalex.org/W2153776416","https://openalex.org/W2169987756","https://openalex.org/W2218592960","https://openalex.org/W2515818068","https://openalex.org/W2767156774","https://openalex.org/W2796678365","https://openalex.org/W2798541891","https://openalex.org/W2999097477","https://openalex.org/W3174052000","https://openalex.org/W4220931662","https://openalex.org/W4253438286","https://openalex.org/W4378904312","https://openalex.org/W4379522516","https://openalex.org/W6885038551"],"related_works":["https://openalex.org/W2098406302","https://openalex.org/W2535115842","https://openalex.org/W2734782074","https://openalex.org/W2546991807","https://openalex.org/W2020176098","https://openalex.org/W2076114130","https://openalex.org/W2121191383","https://openalex.org/W1584415117","https://openalex.org/W2500877097","https://openalex.org/W2436169747"],"abstract_inverted_index":{"Mobility-centric":[0],"design":[1,31,44],"revolves":[2],"around":[3],"the":[4,16,24,46,58,78],"concept":[5],"of":[6,32,38,52,80],"a":[7,30,39],"lease,":[8],"which":[9],"is":[10,45,69],"used":[11],"by":[12,20],"hardware":[13,36,55],"to":[14,22,48],"manage":[15],"cache":[17,41,65,73,82],"memory":[18],"and":[19,35,54],"software":[21,34,53],"program":[23],"hardware.":[25],"This":[26,43],"position":[27],"paper":[28],"presents":[29],"collaborative":[33],"programming":[37],"multicore":[40],"hierarchy.":[42],"first":[47],"allow":[49],"any":[50],"mix":[51],"policies":[56],"on":[57],"same":[59],"machine.":[60],"It":[61],"promises":[62],"more":[63],"powerful":[64],"optimization":[66],"than":[67],"what":[68],"possible":[70],"with":[71],"existing":[72],"designs":[74],"but":[75],"also":[76],"introduces":[77],"problem":[79],"multi-level":[81],"programming.":[83]},"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}