{"id":"https://openalex.org/W4387502444","doi":"https://doi.org/10.1145/3626959","title":"A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route","display_name":"A Machine Learning Approach to Improving Timing Consistency between Global Route and Detailed Route","publication_year":2023,"publication_date":"2023-10-10","ids":{"openalex":"https://openalex.org/W4387502444","doi":"https://doi.org/10.1145/3626959"},"language":"en","primary_location":{"id":"doi:10.1145/3626959","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626959","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069179438","display_name":"Vidya A. Chhabria","orcid":"https://orcid.org/0000-0002-3273-0724"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vidya A. Chhabria","raw_affiliation_strings":["Arizona State University, USA"],"raw_orcid":"https://orcid.org/0000-0002-3273-0724","affiliations":[{"raw_affiliation_string":"Arizona State University, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000829744","display_name":"Wenjing Jiang","orcid":"https://orcid.org/0000-0002-0956-9602"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wenjing Jiang","raw_affiliation_strings":["University of Minnesota, USA"],"raw_orcid":"https://orcid.org/0000-0002-0956-9602","affiliations":[{"raw_affiliation_string":"University of Minnesota, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073558386","display_name":"Andrew B. Kahng","orcid":"https://orcid.org/0000-0002-4490-5018"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew B. Kahng","raw_affiliation_strings":["University of California\u2014San Diego, USA"],"raw_orcid":"https://orcid.org/0000-0002-4490-5018","affiliations":[{"raw_affiliation_string":"University of California\u2014San Diego, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["University of Minnesota, USA"],"raw_orcid":"https://orcid.org/0000-0002-5353-2364","affiliations":[{"raw_affiliation_string":"University of Minnesota, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.19,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.96395437,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"29","issue":"1","first_page":"1","last_page":"25"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8514536619186401},{"id":"https://openalex.org/keywords/unavailability","display_name":"Unavailability","score":0.638014554977417},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5918352007865906},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.49823975563049316},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.4845958948135376},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.4727257788181305},{"id":"https://openalex.org/keywords/bridge","display_name":"Bridge (graph theory)","score":0.4279782176017761},{"id":"https://openalex.org/keywords/oracle","display_name":"Oracle","score":0.4131321310997009},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3621900677680969},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.2988533675670624},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21999791264533997}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8514536619186401},{"id":"https://openalex.org/C2780505938","wikidata":"https://www.wikidata.org/wiki/Q17093282","display_name":"Unavailability","level":2,"score":0.638014554977417},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5918352007865906},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.49823975563049316},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.4845958948135376},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.4727257788181305},{"id":"https://openalex.org/C100776233","wikidata":"https://www.wikidata.org/wiki/Q2532492","display_name":"Bridge (graph theory)","level":2,"score":0.4279782176017761},{"id":"https://openalex.org/C55166926","wikidata":"https://www.wikidata.org/wiki/Q2892946","display_name":"Oracle","level":2,"score":0.4131321310997009},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3621900677680969},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.2988533675670624},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21999791264533997},{"id":"https://openalex.org/C126322002","wikidata":"https://www.wikidata.org/wiki/Q11180","display_name":"Internal medicine","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3626959","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626959","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2200512414","display_name":null,"funder_award_id":"CCF-2112665","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G8466508375","display_name":null,"funder_award_id":"HR0011-18-2-0032","funder_id":"https://openalex.org/F4320332180","funder_display_name":"Defense Advanced Research Projects Agency"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2124501077","https://openalex.org/W2125831674","https://openalex.org/W2293147384","https://openalex.org/W2295598076","https://openalex.org/W2946332877","https://openalex.org/W2946795101","https://openalex.org/W2997936488","https://openalex.org/W3036410182","https://openalex.org/W3092337895","https://openalex.org/W3111684605","https://openalex.org/W4212927526","https://openalex.org/W4245501382","https://openalex.org/W4293023278","https://openalex.org/W4293024071","https://openalex.org/W4379115826"],"related_works":["https://openalex.org/W4237235066","https://openalex.org/W207884067","https://openalex.org/W3127016596","https://openalex.org/W2026539069","https://openalex.org/W2365973415","https://openalex.org/W2170314243","https://openalex.org/W4380987687","https://openalex.org/W1962246972","https://openalex.org/W2792825668","https://openalex.org/W4242528088"],"abstract_inverted_index":{"Due":[0],"to":[1,11,37,58,83,166,202,205,216],"the":[2,15,55,74,91,113,152],"unavailability":[3],"of":[4,17,73,115,131,222],"routing":[5,13,80],"information":[6],"in":[7,158,190],"design":[8,29,38],"stages":[9],"prior":[10],"detailed":[12],"(DR),":[14],"tasks":[16],"timing":[18,26,44,87,97,145,192],"prediction":[19,27,45],"and":[20,34,50,60,96,99,171,182,213],"optimization":[21,82,104],"pose":[22],"major":[23],"challenges.":[24],"Inaccurate":[25],"wastes":[28],"effort,":[30],"hurts":[31],"circuit":[32,160],"performance,":[33],"may":[35],"lead":[36],"failure.":[39],"This":[40],"work":[41],"focuses":[42],"on":[43,128,177],"after":[46],"clock":[47,210],"tree":[48],"synthesis":[49],"placement":[51],"legalization,":[52],"which":[53],"is":[54,135,164],"earliest":[56],"opportunity":[57],"time":[59],"optimize":[61],"a":[62,129,172,183],"\u201ccomplete\u201d":[63],"netlist.":[64],"The":[65,162,198],"article":[66],"first":[67],"documents":[68],"that":[69,137],"having":[70],"\u201coracle":[71],"knowledge\u201d":[72],"final":[75,86],"post-DR":[76,100,159,191],"parasitics":[77],"enables":[78],"post-global":[79],"(GR)":[81],"produce":[84],"improved":[85],"outcomes.":[88],"To":[89],"bridge":[90],"gap":[92],"between":[93],"GR-based":[94,144],"parasitic":[95],"estimation":[98],"results":[101,176],"during":[102,149],"post-GR":[103,150],",":[105],"machine":[106],"learning":[107],"(ML)-based":[108],"models":[109,139,154,199],"are":[110,200,214],"proposed,":[111],"including":[112],"use":[114],"features":[116],"for":[117,120,123],"macro":[118],"blockages":[119],"accurate":[121],"predictions":[122],"designs":[124,206],"with":[125,219],"macros.":[126],"Based":[127],"set":[130],"experimental":[132],"evaluations,":[133],"it":[134],"demonstrated":[136,201],"these":[138],"show":[140,155,188],"higher":[141],"accuracy":[142],"than":[143],"estimation.":[146],"When":[147],"used":[148],"optimization,":[151],"ML-based":[153],"demonstrable":[156],"improvements":[157,189],"performance.":[161],"methodology":[163],"applied":[165],"two":[167],"different":[168,209],"tool":[169,174],"flows\u2014OpenROAD":[170],"commercial":[173,184],"flow\u2014and":[175],"an":[178],"open-source":[179],"45nm":[180],"bulk":[181],"12nm":[185],"FinFET":[186],"enablement":[187],"slack":[193],"metrics":[194],"without":[195],"increasing":[196],"congestion.":[197],"be":[203],"generalizable":[204],"generated":[207],"under":[208],"period":[211],"constraints":[212],"robust":[215],"training":[217],"data":[218],"small":[220],"levels":[221],"noise.":[223]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}