{"id":"https://openalex.org/W4387377842","doi":"https://doi.org/10.1145/3626322","title":"Sequential Routing-based Time-division Multiplexing Optimization for Multi-FPGA Systems","display_name":"Sequential Routing-based Time-division Multiplexing Optimization for Multi-FPGA Systems","publication_year":2023,"publication_date":"2023-10-05","ids":{"openalex":"https://openalex.org/W4387377842","doi":"https://doi.org/10.1145/3626322"},"language":"en","primary_location":{"id":"doi:10.1145/3626322","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626322","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100347551","display_name":"Lin Wen-xiong","orcid":"https://orcid.org/0000-0002-9456-9286"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenxiong Lin","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0000-0002-9456-9286","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100702425","display_name":"Haojie Wu","orcid":"https://orcid.org/0009-0001-7767-130X"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haojie Wu","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0009-0001-7767-130X","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100362412","display_name":"Peng Gao","orcid":"https://orcid.org/0000-0002-9954-1856"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peng Gao","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0000-0002-9954-1856","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101679868","display_name":"Wenjun Luo","orcid":"https://orcid.org/0009-0004-9576-9820"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenjun Luo","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0009-0004-9576-9820","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050076555","display_name":"Shuting Cai","orcid":"https://orcid.org/0000-0002-2842-6439"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuting Cai","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0000-0002-2842-6439","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007822830","display_name":"Xiaoming Xiong","orcid":"https://orcid.org/0000-0002-2421-7621"},"institutions":[{"id":"https://openalex.org/I139024713","display_name":"Guangdong University of Technology","ror":"https://ror.org/04azbjn80","country_code":"CN","type":"education","lineage":["https://openalex.org/I139024713"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xiaoming Xiong","raw_affiliation_strings":["Guangdong University of Technology, China"],"raw_orcid":"https://orcid.org/0000-0002-2421-7621","affiliations":[{"raw_affiliation_string":"Guangdong University of Technology, China","institution_ids":["https://openalex.org/I139024713"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3681,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.59739321,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"28","issue":"6","first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.835219144821167},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7966619729995728},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6827479004859924},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6713329553604126},{"id":"https://openalex.org/keywords/time-division-multiplexing","display_name":"Time-division multiplexing","score":0.592352032661438},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5370364189147949},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.5363819003105164},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.481550008058548},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44153308868408203},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37225979566574097},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3368913531303406},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10925093293190002}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.835219144821167},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7966619729995728},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6827479004859924},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6713329553604126},{"id":"https://openalex.org/C50661577","wikidata":"https://www.wikidata.org/wiki/Q901831","display_name":"Time-division multiplexing","level":3,"score":0.592352032661438},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5370364189147949},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.5363819003105164},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.481550008058548},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44153308868408203},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37225979566574097},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3368913531303406},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10925093293190002},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3626322","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626322","pdf_url":null,"source":{"id":"https://openalex.org/S105046310","display_name":"ACM Transactions on Design Automation of Electronic Systems","issn_l":"1084-4309","issn":["1084-4309","1557-7309"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Design Automation of Electronic Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1940299996","https://openalex.org/W1990317614","https://openalex.org/W1998679126","https://openalex.org/W2121066557","https://openalex.org/W2584883722","https://openalex.org/W2585649541","https://openalex.org/W2998727840","https://openalex.org/W3092111355","https://openalex.org/W3092302326","https://openalex.org/W3128035532","https://openalex.org/W4200477342"],"related_works":["https://openalex.org/W431360389","https://openalex.org/W1998182654","https://openalex.org/W2003701703","https://openalex.org/W1989617274","https://openalex.org/W181065026","https://openalex.org/W2092309091","https://openalex.org/W2187051616","https://openalex.org/W2111804337","https://openalex.org/W4226230195","https://openalex.org/W2111698590"],"abstract_inverted_index":{"Multi-field":[0],"programming":[1],"gate":[2],"array":[3],"(FPGA)":[4],"systems":[5,180],"are":[6],"widely":[7],"used":[8],"in":[9,39,50,170,198],"various":[10],"circuit":[11],"design-related":[12],"areas,":[13],"such":[14],"as":[15,194],"hardware":[16],"emulation,":[17],"virtual":[18],"prototypes,":[19],"and":[20,32,112],"chiplet":[21],"design":[22],"methodologies.":[23],"However,":[24,63],"a":[25,37,40,51,75,79,91,108,128,133,141],"physical":[26],"resource":[27],"clash":[28],"between":[29],"inter-FPGA":[30,44],"signals":[31,45],"I/O":[33,48],"pins":[34,49],"can":[35],"create":[36],"bottleneck":[38],"multi-FPGA":[41,52,76,147,179],"system.":[42,53,77,148],"Specifically,":[43],"often":[46],"outnumber":[47],"To":[54],"solve":[55],"this":[56,87],"problem,":[57],"time-division":[58],"multiplexing":[59],"(TDM)":[60],"is":[61,84,137],"introduced.":[62],"undue":[64],"time":[65],"delay":[66],"caused":[67],"by":[68],"TDM":[69,82,113,135,143,196],"may":[70],"impair":[71],"the":[72,98,121,124,146,151,176,189,201],"performance":[73,177],"of":[74,100,105,123,154,173,178,200],"Therefore,":[78],"more":[80],"efficient":[81],"solution":[83],"needed.":[85],"In":[86],"work,":[88],"we":[89,187],"propose":[90],"new":[92],"routing":[93,110,130,163],"sequence":[94,164],"strategy":[95,103,165],"to":[96,126,139,184,195],"improve":[97],"efficiency":[99],"TDM.":[101],"Our":[102],"consists":[104],"two":[106,191],"parts:":[107],"weighted":[109],"algorithm":[111,117],"assignment":[114,136],"optimization.":[115],"The":[116],"takes":[118],"into":[119],"account":[120],"weight":[122],"net":[125],"generate":[127],"high-quality":[129],"topology.":[131],"Then,":[132],"net-based":[134],"performed":[138],"obtain":[140],"lower":[142],"ratio":[144],"for":[145],"Experiments":[149],"on":[150],"public":[152],"dataset":[153],"CAD":[155],"Contest":[156],"2019":[157],"at":[158],"ICCAD":[159],"showed":[160],"that":[161],"our":[162],"achieved":[166],"good":[167],"results.":[168],"Especially":[169],"those":[171],"testcases":[172],"unbalanced":[174],"designs,":[175],"was":[181],"improved":[182],"up":[183],"2.63.":[185],"Moreover,":[186],"outperformed":[188],"top":[190],"contest":[192],"finalists":[193],"results":[197],"most":[199],"testcases.":[202]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}