{"id":"https://openalex.org/W4392682258","doi":"https://doi.org/10.1145/3626184.3639690","title":"Physical Design Challenges in Modern Heterogeneous Integration","display_name":"Physical Design Challenges in Modern Heterogeneous Integration","publication_year":2024,"publication_date":"2024-03-12","ids":{"openalex":"https://openalex.org/W4392682258","doi":"https://doi.org/10.1145/3626184.3639690"},"language":"en","primary_location":{"id":"doi:10.1145/3626184.3639690","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626184.3639690","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2024 International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018371636","display_name":"Yao\u2010Wen Chang","orcid":"https://orcid.org/0000-0002-0564-5719"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yao-Wen Chang","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University &amp; Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University &amp; Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5018371636"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":3.3449,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.92536081,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"125","last_page":"134"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.6830072999000549},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5600910186767578},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5497352480888367},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.5381802320480347},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4892125129699707},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.48733314871788025},{"id":"https://openalex.org/keywords/extreme-ultraviolet-lithography","display_name":"Extreme ultraviolet lithography","score":0.47140219807624817},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4697972238063812},{"id":"https://openalex.org/keywords/process-integration","display_name":"Process integration","score":0.4638391137123108},{"id":"https://openalex.org/keywords/system-integration","display_name":"System integration","score":0.4577469229698181},{"id":"https://openalex.org/keywords/electronic-component","display_name":"Electronic component","score":0.4418797492980957},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.43658873438835144},{"id":"https://openalex.org/keywords/lithography","display_name":"Lithography","score":0.425836980342865},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.29817235469818115},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27242040634155273},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26443254947662354},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.23179012537002563},{"id":"https://openalex.org/keywords/process-engineering","display_name":"Process engineering","score":0.17341601848602295},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.17329749464988708},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.14470979571342468},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11538165807723999}],"concepts":[{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.6830072999000549},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5600910186767578},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5497352480888367},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.5381802320480347},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4892125129699707},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.48733314871788025},{"id":"https://openalex.org/C162996421","wikidata":"https://www.wikidata.org/wiki/Q371965","display_name":"Extreme ultraviolet lithography","level":2,"score":0.47140219807624817},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4697972238063812},{"id":"https://openalex.org/C54725748","wikidata":"https://www.wikidata.org/wiki/Q7247277","display_name":"Process integration","level":2,"score":0.4638391137123108},{"id":"https://openalex.org/C19527686","wikidata":"https://www.wikidata.org/wiki/Q1665453","display_name":"System integration","level":2,"score":0.4577469229698181},{"id":"https://openalex.org/C81060104","wikidata":"https://www.wikidata.org/wiki/Q11653","display_name":"Electronic component","level":2,"score":0.4418797492980957},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.43658873438835144},{"id":"https://openalex.org/C204223013","wikidata":"https://www.wikidata.org/wiki/Q133036","display_name":"Lithography","level":2,"score":0.425836980342865},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.29817235469818115},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27242040634155273},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26443254947662354},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.23179012537002563},{"id":"https://openalex.org/C21880701","wikidata":"https://www.wikidata.org/wiki/Q2144042","display_name":"Process engineering","level":1,"score":0.17341601848602295},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.17329749464988708},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.14470979571342468},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11538165807723999},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3626184.3639690","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3626184.3639690","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2024 International Symposium on Physical Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5299999713897705,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1985647466","https://openalex.org/W2020461489","https://openalex.org/W2025516544","https://openalex.org/W2042191317","https://openalex.org/W2070872350","https://openalex.org/W2113046208","https://openalex.org/W2144672268","https://openalex.org/W2147776496","https://openalex.org/W2149534902","https://openalex.org/W2154854069","https://openalex.org/W2161129061","https://openalex.org/W2220870060","https://openalex.org/W2536308627","https://openalex.org/W2586276609","https://openalex.org/W2967365787","https://openalex.org/W2998090531","https://openalex.org/W3013149421","https://openalex.org/W3092072718","https://openalex.org/W3092200740","https://openalex.org/W3092574066","https://openalex.org/W3144995927","https://openalex.org/W3148727081","https://openalex.org/W3169517138","https://openalex.org/W3203992401","https://openalex.org/W3213350348","https://openalex.org/W3213574182","https://openalex.org/W4205841751","https://openalex.org/W4244790824","https://openalex.org/W4293023546","https://openalex.org/W4312121055","https://openalex.org/W4319878652","https://openalex.org/W4386763911","https://openalex.org/W4386763986","https://openalex.org/W4386764000","https://openalex.org/W4386764970","https://openalex.org/W4389162731","https://openalex.org/W4390241306","https://openalex.org/W4401568203","https://openalex.org/W6679695434"],"related_works":["https://openalex.org/W2743305891","https://openalex.org/W2051886008","https://openalex.org/W2535520145","https://openalex.org/W1716153929","https://openalex.org/W4247760676","https://openalex.org/W3205162826","https://openalex.org/W3199828306","https://openalex.org/W1999810416","https://openalex.org/W3112090072","https://openalex.org/W4285188925"],"abstract_inverted_index":{"To":[0],"achieve":[1],"the":[2,13,32,52,62,112,121,170],"power,":[3],"performance,":[4],"and":[5,44,61,107,119,139,147,161,185,190,198],"area":[6],"(PPA)":[7],"target":[8],"in":[9,100,169],"modern":[10,204],"semiconductor":[11],"design,":[12,75],"trend":[14],"to":[15,57,84,130],"go":[16],"for":[17,38,125,203,207],"More-than-Moore":[18],"heterogeneous":[19,126,182,208],"integration":[20,40,82,127,183],"by":[21],"packing":[22],"various":[23],"components/dies":[24],"into":[25,89],"a":[26,90,94,101],"package":[27,95],"becomes":[28],"more":[29,58],"obvious":[30],"as":[31,155],"economic":[33],"advantages":[34],"of":[35,55],"More-Moore":[36],"scaling":[37],"on-chip":[39,113],"are":[41,165],"getting":[42],"smaller":[43],"smaller.":[45],"In":[46,175],"particular,":[47],"we":[48,178],"have":[49],"already":[50],"encountered":[51],"high":[53,63],"cost":[54,65],"moving":[56],"advanced":[59],"technology":[60],"fabrication":[64],"associated":[66],"with":[67,115,149],"extreme":[68],"ultraviolet":[69],"(EUV)":[70],"lithography":[71],",":[72],"mask,":[73],"process,":[74],"electronic":[76],"design":[77,123,173,192,206],"automation":[78],"(EDA),":[79],"etc.":[80],"Heterogeneous":[81],"refers":[83],"integrating":[85],"separately":[86],"manufactured":[87],"components":[88,118],"higher-level":[91],"assembly":[92],"(in":[93],"or":[96],"even":[97],"multiple":[98,150],"packages":[99],"PCB)":[102],"that":[103],"provides":[104],"enhanced":[105],"functionality":[106],"improved":[108],"operating":[109],"characteristics.":[110],"Unlike":[111],"designs":[114],"relatively":[116],"regular":[117],"wirings,":[120],"physical":[122,191,205],"problem":[124],"often":[128],"needs":[129],"handle":[131],"arbitrary":[132],"component":[133],"shapes,":[134],"diverse":[135],"metal":[136],"wire":[137,145],"widths,":[138],"different":[140],"spacing":[141],"requirements":[142],"between":[143],"components,":[144],"metals,":[146],"pads,":[148],"cross-physics":[151],"domain":[152],"considerations":[153],"such":[154],"system-level,":[156],"physical,":[157],"electrical,":[158],"mechanical,":[159],"thermal,":[160],"optical":[162],"effects,":[163],"which":[164],"not":[166],"well":[167],"addressed":[168],"traditional":[171],"chip":[172],"flow.":[174],"this":[176],"paper,":[177],"first":[179],"introduce":[180],"popular":[181],"technologies":[184],"options,":[186],"their":[187],"layout":[188],"modeling":[189],"challenges,":[193],"survey":[194],"key":[195],"published":[196],"techniques,":[197],"provide":[199],"future":[200],"research":[201],"directions":[202],"integration.":[209]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":11},{"year":2024,"cited_by_count":2}],"updated_date":"2026-03-28T08:17:26.163206","created_date":"2025-10-10T00:00:00"}
