{"id":"https://openalex.org/W4388581411","doi":"https://doi.org/10.1145/3624062.3624173","title":"GPU Graph Processing on CXL-Based Microsecond-Latency External Memory","display_name":"GPU Graph Processing on CXL-Based Microsecond-Latency External Memory","publication_year":2023,"publication_date":"2023-11-10","ids":{"openalex":"https://openalex.org/W4388581411","doi":"https://doi.org/10.1145/3624062.3624173"},"language":"en","primary_location":{"id":"doi:10.1145/3624062.3624173","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3624062.3624173","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the SC '23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2312.03113","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005846741","display_name":"Shintaro Sano","orcid":"https://orcid.org/0009-0009-2988-9724"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Shintaro Sano","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0009-2988-9724","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101878895","display_name":"Yosuke Bando","orcid":"https://orcid.org/0000-0002-9150-6503"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yosuke Bando","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0000-0002-9150-6503","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017072279","display_name":"Kazuhiro Hiwada","orcid":"https://orcid.org/0009-0004-3610-6496"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kazuhiro Hiwada","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0004-3610-6496","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038082267","display_name":"Hirotsugu Kajihara","orcid":"https://orcid.org/0009-0000-4784-8234"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hirotsugu Kajihara","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0000-4784-8234","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061662474","display_name":"Tomoya Suzuki","orcid":"https://orcid.org/0009-0008-3031-2693"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tomoya Suzuki","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0008-3031-2693","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055200484","display_name":"Y. Nakanishi","orcid":"https://orcid.org/0009-0001-3312-3395"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yu Nakanishi","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0001-3312-3395","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066546576","display_name":"Daisuke Taki","orcid":"https://orcid.org/0009-0007-7193-4723"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Daisuke Taki","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0007-7193-4723","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089640737","display_name":"Akiyuki Kaneko","orcid":"https://orcid.org/0009-0001-0066-0469"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Akiyuki Kaneko","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0001-0066-0469","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089754001","display_name":"Tatsuo Shiozawa","orcid":"https://orcid.org/0009-0001-6679-3950"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tatsuo Shiozawa","raw_affiliation_strings":["Kioxia Corporation, Japan"],"raw_orcid":"https://orcid.org/0009-0001-6679-3950","affiliations":[{"raw_affiliation_string":"Kioxia Corporation, Japan","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":0,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7493,"has_fulltext":true,"cited_by_count":7,"citation_normalized_percentile":{"value":0.73603091,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"962","last_page":"972"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12292","display_name":"Graph Theory and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12292","display_name":"Graph Theory and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11273","display_name":"Advanced Graph Neural Networks","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8368246555328369},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6614758372306824},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5769132971763611},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.5319713950157166},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5223913788795471},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.4710533320903778},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.46810221672058105},{"id":"https://openalex.org/keywords/auxiliary-memory","display_name":"Auxiliary memory","score":0.4421798586845398},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.43820756673812866},{"id":"https://openalex.org/keywords/graph-traversal","display_name":"Graph traversal","score":0.4231169819831848},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35731521248817444},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.3369179964065552},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3260146975517273},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.25544434785842896},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.1658959984779358}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8368246555328369},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6614758372306824},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5769132971763611},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.5319713950157166},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5223913788795471},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.4710533320903778},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.46810221672058105},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.4421798586845398},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.43820756673812866},{"id":"https://openalex.org/C96333769","wikidata":"https://www.wikidata.org/wiki/Q907955","display_name":"Graph traversal","level":3,"score":0.4231169819831848},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35731521248817444},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.3369179964065552},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3260146975517273},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.25544434785842896},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.1658959984779358},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3624062.3624173","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3624062.3624173","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the SC '23 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:2312.03113","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2312.03113","pdf_url":"https://arxiv.org/pdf/2312.03113","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2312.03113","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2312.03113","pdf_url":"https://arxiv.org/pdf/2312.03113","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[{"score":0.4099999964237213,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4388581411.pdf","grobid_xml":"https://content.openalex.org/works/W4388581411.grobid-xml"},"referenced_works_count":42,"referenced_works":["https://openalex.org/W1425731158","https://openalex.org/W1446278828","https://openalex.org/W1788180225","https://openalex.org/W1945708402","https://openalex.org/W2011963492","https://openalex.org/W2013100386","https://openalex.org/W2034102265","https://openalex.org/W2053076698","https://openalex.org/W2068015060","https://openalex.org/W2078794610","https://openalex.org/W2170616854","https://openalex.org/W2509091023","https://openalex.org/W2521121845","https://openalex.org/W2605325442","https://openalex.org/W2605442520","https://openalex.org/W2606413522","https://openalex.org/W2765155492","https://openalex.org/W2767104566","https://openalex.org/W2798525482","https://openalex.org/W2805009828","https://openalex.org/W2884496840","https://openalex.org/W2901994046","https://openalex.org/W2934021599","https://openalex.org/W3011293047","https://openalex.org/W3013163801","https://openalex.org/W3033692458","https://openalex.org/W3035128007","https://openalex.org/W3106620263","https://openalex.org/W3164035230","https://openalex.org/W4225923499","https://openalex.org/W4236539906","https://openalex.org/W4253114834","https://openalex.org/W4281971439","https://openalex.org/W4317038433","https://openalex.org/W4318541517","https://openalex.org/W4318541614","https://openalex.org/W4320060575","https://openalex.org/W4324301476","https://openalex.org/W4327930439","https://openalex.org/W4361194512","https://openalex.org/W4380668114","https://openalex.org/W4394639551"],"related_works":["https://openalex.org/W3008068282","https://openalex.org/W2138825797","https://openalex.org/W4243618206","https://openalex.org/W2148966412","https://openalex.org/W2185658074","https://openalex.org/W2019238062","https://openalex.org/W2027423831","https://openalex.org/W1979830285","https://openalex.org/W2896161911","https://openalex.org/W1455439291"],"abstract_inverted_index":{"In":[0],"GPU":[1,30,49,85,137],"graph":[2,50,63,86,138],"analytics,":[3],"the":[4,11,26,29,36,71,107,114,147],"use":[5,37],"of":[6,28,38,99],"external":[7,46,96],"memory":[8,43,47,59,97,116,124,130],"such":[9],"as":[10,44,67,69,110,112,128],"host":[12,72,148],"DRAM":[13],"and":[14,76],"solid-state":[15],"drives":[16],"is":[17,66],"a":[18,102],"cost-effective":[19,136],"approach":[20],"to":[21,54,101,132,145],"processing":[22,51,64,139],"large":[23],"graphs":[24],"beyond":[25],"capacity":[27],"onboard":[31],"memory.":[32],"This":[33,118],"paper":[34],"studies":[35],"Compute":[39],"Express":[40],"Link":[41],"(CXL)":[42],"alternative":[45],"for":[48],"in":[52],"order":[53],"see":[55],"if":[56],"this":[57],"emerging":[58],"expansion":[60],"technology":[61],"enables":[62],"that":[65,83,121],"fast":[68],"using":[70,78,146],"DRAM.":[73,149],"Through":[74],"analysis":[75],"evaluation":[77],"FPGA":[79],"prototypes,":[80],"we":[81],"show":[82],"representative":[84],"traversal":[87],"algorithms":[88],"involving":[89],"fine-grained":[90],"random":[91],"access":[92],"can":[93],"tolerate":[94],"an":[95],"latency":[98],"up":[100],"few":[103],"microseconds":[104],"introduced":[105],"by":[106,113],"CXL":[108,129],"interface":[109],"well":[111],"underlying":[115],"devices.":[117],"insight":[119],"indicates":[120],"microsecond-latency":[122],"flash":[123],"may":[125],"be":[126],"used":[127],"devices":[131],"realize":[133],"even":[134],"more":[135],"while":[140],"still":[141],"achieving":[142],"performance":[143],"close":[144]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":3}],"updated_date":"2026-07-03T08:13:44.112507","created_date":"2025-10-10T00:00:00"}