{"id":"https://openalex.org/W4385585306","doi":"https://doi.org/10.1145/3587135.3591439","title":"Implementation and Performance Evaluation of Bit Manipulation Extension on CVA6 RISC-V","display_name":"Implementation and Performance Evaluation of Bit Manipulation Extension on CVA6 RISC-V","publication_year":2023,"publication_date":"2023-05-09","ids":{"openalex":"https://openalex.org/W4385585306","doi":"https://doi.org/10.1145/3587135.3591439"},"language":"en","primary_location":{"id":"doi:10.1145/3587135.3591439","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3587135.3591439","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3587135.3591439","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3587135.3591439","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017615998","display_name":"Muhammad Ali Ijaz","orcid":"https://orcid.org/0000-0003-3375-9155"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Muhammad Ijaz","raw_affiliation_strings":["10xEngineers, Lahore, Pakistan"],"raw_orcid":"https://orcid.org/0000-0003-3375-9155","affiliations":[{"raw_affiliation_string":"10xEngineers, Lahore, Pakistan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092598602","display_name":"Fatima Saleem","orcid":"https://orcid.org/0009-0000-3772-9389"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Fatima Saleem","raw_affiliation_strings":["10xEngineers, Lahore, Pakistan"],"raw_orcid":"https://orcid.org/0009-0000-3772-9389","affiliations":[{"raw_affiliation_string":"10xEngineers, Lahore, Pakistan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039847848","display_name":"Umer Shahid","orcid":"https://orcid.org/0000-0003-4666-0277"},"institutions":[{"id":"https://openalex.org/I142732210","display_name":"University of Engineering and Technology Lahore","ror":"https://ror.org/0051w2v06","country_code":"PK","type":"education","lineage":["https://openalex.org/I142732210"]}],"countries":["PK"],"is_corresponding":false,"raw_author_name":"Umer Shahid","raw_affiliation_strings":["University of Engineering and Technology, Lahore, Pakistan"],"raw_orcid":"https://orcid.org/0000-0003-4666-0277","affiliations":[{"raw_affiliation_string":"University of Engineering and Technology, Lahore, Pakistan","institution_ids":["https://openalex.org/I142732210"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5092598603","display_name":"Saad Waheed","orcid":"https://orcid.org/0009-0003-3704-2052"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Saad Waheed","raw_affiliation_strings":["10xEngineers, Lahore, Pakistan"],"raw_orcid":"https://orcid.org/0009-0003-3704-2052","affiliations":[{"raw_affiliation_string":"10xEngineers, Lahore, Pakistan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006083727","display_name":"J. Coulon","orcid":"https://orcid.org/0009-0000-1904-479X"},"institutions":[{"id":"https://openalex.org/I4210140930","display_name":"Thales (France)","ror":"https://ror.org/04emwm605","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210140930"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Jean-Roch Coulon","raw_affiliation_strings":["Thales Group, Meyreuil, France"],"raw_orcid":"https://orcid.org/0009-0000-1904-479X","affiliations":[{"raw_affiliation_string":"Thales Group, Meyreuil, France","institution_ids":["https://openalex.org/I4210140930"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5017615998"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.197,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.77019201,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"385","last_page":"386"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7733270525932312},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6982671618461609},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6586338877677917},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6372545957565308},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5913008451461792},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4774901568889618},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.44998854398727417},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.4145861268043518},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3661389946937561},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3529561161994934}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7733270525932312},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6982671618461609},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6586338877677917},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6372545957565308},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5913008451461792},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4774901568889618},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.44998854398727417},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.4145861268043518},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3661389946937561},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3529561161994934}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3587135.3591439","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3587135.3591439","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3587135.3591439","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3587135.3591439","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3587135.3591439","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3587135.3591439","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 20th ACM International Conference on Computing Frontiers","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.75}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4385585306.pdf","grobid_xml":"https://content.openalex.org/works/W4385585306.grobid-xml"},"referenced_works_count":5,"referenced_works":["https://openalex.org/W2004340162","https://openalex.org/W2187802606","https://openalex.org/W2936567838","https://openalex.org/W2980249900","https://openalex.org/W3159032828"],"related_works":["https://openalex.org/W2114044010","https://openalex.org/W4364295250","https://openalex.org/W1995515112","https://openalex.org/W2128502296","https://openalex.org/W2088017777","https://openalex.org/W2101069312","https://openalex.org/W4389418089","https://openalex.org/W3167587462","https://openalex.org/W3033918533","https://openalex.org/W2806352516"],"abstract_inverted_index":{"An":[0],"embedded":[1,93],"system":[2,48],"requires":[3],"two":[4],"conflicting":[5],"attributes,":[6],"low":[7,56],"power":[8,57,145,195],"and":[9,14,59,130,144,152,158,185,221,235],"high":[10],"performance.":[11],"Embedded":[12],"controllers":[13],"Internet":[15],"of":[16,42,106,150,170,213],"Things":[17],"(IoT)":[18],"applications":[19],"are":[20],"seeing":[21],"a":[22],"paradigm":[23],"shift":[24],"from":[25],"using":[26,125],"x86":[27],"or":[28,180],"ARMv8":[29],"to":[30,51,76,90],"the":[31,40,101,117,121,131,148,167,175,211,241],"widely":[32],"accepted":[33],"RISC-V":[34,63,77,107],"architecture.":[35],"Bit":[36],"manipulation":[37,44,72,88,103],"Instructions":[38],"improve":[39],"speed":[41],"bit":[43,71,87,102],"by":[45,165],"providing":[46],"better":[47],"performance":[49,157,168],"due":[50,75],"its":[52],"improved":[53,60],"code":[54,159,202,237],"density,":[55],"consumption,":[58],"runtime":[61],"efficiency.":[62],"base":[64],"Instruction":[65],"Set":[66],"Architecture":[67],"(ISA)":[68],"doesn't":[69],"support":[70,91],"instructions.":[73],"However,":[74],"architecture's":[78],"modularized":[79],"instruction":[80],"extension":[81,104],"support,":[82],"processor":[83],"designers":[84],"can":[85],"add":[86],"instructions":[89],"low-power":[92],"applications.":[94],"In":[95],"this":[96],"paper,":[97],"we":[98],"have":[99,115,138,231],"implemented":[100],"(B-extension)":[105],"on":[108,142],"OpenHW's":[109],"application":[110],"class":[111],"SoC":[112],"CVA6.":[113],"We":[114,137,230],"synthesized":[116],"design":[118],"for":[119,182,197,208,218,227,240],"both":[120,183],"Kintex-7":[122],"FPGA":[123,151,219],"board":[124],"Xilinx":[126],"Vivado":[127],"ISE":[128],"2018.2":[129],"TSMC":[132],"65":[133],"nm":[134],"cell":[135],"library.":[136],"performed":[139],"quantitative":[140],"analysis":[141],"size":[143,160,203,238],"improvement":[146,192,200],"with":[147],"help":[149],"ASIC":[153,228],"synthesis":[154],"data.":[155],"The":[156,188],"reduction":[161,239],"capacity":[162],"is":[163],"presented":[164],"showing":[166],"results":[169],"Dhrystone":[171,242],"standard":[172,176],"benchmarks":[173],"against":[174],"CVA6":[177],"ISA":[178],"(IMAFDC":[179],"IMAFC)":[181],"RV64":[184],"RV32":[186],"configurations.":[187],"result":[189],"shows":[190],"4%":[191,214,236],"in":[193,201,216,224],"dynamic":[194],"usage":[196],"RV64,":[198],"12.5%":[199],"while":[204],"building":[205],"Linux":[206],"image":[207],"RV64IMAFDCB":[209],"at":[210],"cost":[212],"increase":[215,223],"LUTs":[217],"implementation":[220],"3%":[222],"gate":[225],"count":[226],"implementation.":[229],"seen":[232],"18%":[233],"speed-up":[234],"benchmark.":[243]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}