{"id":"https://openalex.org/W4362565578","doi":"https://doi.org/10.1145/3579895.3579935","title":"AXI, APB and AXI NOC Model Design Based on SysmteC","display_name":"AXI, APB and AXI NOC Model Design Based on SysmteC","publication_year":2022,"publication_date":"2022-12-09","ids":{"openalex":"https://openalex.org/W4362565578","doi":"https://doi.org/10.1145/3579895.3579935"},"language":"en","primary_location":{"id":"doi:10.1145/3579895.3579935","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3579895.3579935","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2022 11th International Conference on Networks, Communication and Computing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052555177","display_name":"Shuaiting Ma","orcid":"https://orcid.org/0000-0001-7549-1252"},"institutions":[{"id":"https://openalex.org/I83776822","display_name":"Shandong Institute of Business and Technology","ror":"https://ror.org/03rrkrc24","country_code":"CN","type":"education","lineage":["https://openalex.org/I83776822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuaiting Ma","raw_affiliation_strings":["Shandong Technology and Business University, China"],"raw_orcid":"https://orcid.org/0000-0001-7549-1252","affiliations":[{"raw_affiliation_string":"Shandong Technology and Business University, China","institution_ids":["https://openalex.org/I83776822"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089867966","display_name":"Jinxue Sui","orcid":"https://orcid.org/0000-0003-1060-2139"},"institutions":[{"id":"https://openalex.org/I83776822","display_name":"Shandong Institute of Business and Technology","ror":"https://ror.org/03rrkrc24","country_code":"CN","type":"education","lineage":["https://openalex.org/I83776822"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jinxue Sui","raw_affiliation_strings":["Shandong Technology and Business University, China"],"raw_orcid":"https://orcid.org/0000-0001-7252-5621","affiliations":[{"raw_affiliation_string":"Shandong Technology and Business University, China","institution_ids":["https://openalex.org/I83776822"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049405256","display_name":"Xia Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xia Zhang","raw_affiliation_strings":["Advanced Institute Of Information Technology Peking University, China"],"raw_orcid":"https://orcid.org/0000-0002-3969-4893","affiliations":[{"raw_affiliation_string":"Advanced Institute Of Information Technology Peking University, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1426,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.53594389,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"261","last_page":"266"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9672315120697021},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8217369318008423},{"id":"https://openalex.org/keywords/transaction-level-modeling","display_name":"Transaction-level modeling","score":0.7736612558364868},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6771081686019897},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.5899724364280701},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5365880131721497},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.5240466594696045},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4903688430786133},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4764428734779358},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.42351579666137695},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.17817172408103943},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11555668711662292}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9672315120697021},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8217369318008423},{"id":"https://openalex.org/C169571997","wikidata":"https://www.wikidata.org/wiki/Q966099","display_name":"Transaction-level modeling","level":3,"score":0.7736612558364868},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6771081686019897},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.5899724364280701},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5365880131721497},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.5240466594696045},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4903688430786133},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4764428734779358},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.42351579666137695},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.17817172408103943},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11555668711662292}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3579895.3579935","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3579895.3579935","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2022 11th International Conference on Networks, Communication and Computing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1527949151","https://openalex.org/W2045288795","https://openalex.org/W2061812384","https://openalex.org/W2734248900","https://openalex.org/W4233551234"],"related_works":["https://openalex.org/W1525398417","https://openalex.org/W2170029576","https://openalex.org/W4247397443","https://openalex.org/W2548514518","https://openalex.org/W2790192245","https://openalex.org/W1996984607","https://openalex.org/W2059569687","https://openalex.org/W2537443402","https://openalex.org/W2133071611","https://openalex.org/W1984090905"],"abstract_inverted_index":{"With":[0],"the":[1,12,18,36,39,59,63,83,109,122,128,160,216,231,242,250,282,289,292,295,298],"increasing":[2],"complexity":[3],"of":[4,21,35,42,86,146,169,178,288,297,300],"system-on-a-chip":[5],"(SoC)":[6],"design,":[7],"in":[8,38,58,62,71,74,82,162],"order":[9,213],"to":[10,16,28,45,50,214,237,273],"improve":[11],"design":[13],"speed":[14],"and":[15,77,80,88,101,127,148,188,207,255,275,285],"make":[17],"function":[19,299],"verification":[20,34,103,172,268,286,290],"complex":[22,170],"system":[23,31,37,98,153,171],"more":[24,120],"efficient,":[25],"we":[26],"need":[27],"conduct":[29],"in-depth":[30],"level":[32,56,99,113,154,261],"model":[33,57,114,142],"early":[40],"stage":[41],"design.":[43],"Due":[44],"SystemVerilog":[46],"language":[47,118],"is":[48,119,125,131,193,226,235,278,306],"used":[49,236],"establish":[51],"a":[52,167,198,267],"RTL(Register":[53],"Transfer":[54],"Level)":[55],"chip":[60],"modeling":[61,100,155,177,262],"past":[64],"few":[65],"years,":[66],"which":[67],"was":[68],"not":[69],"high":[70],"abstraction,":[72],"long":[73],"development":[75,123],"time":[76,124,130],"simulation":[78,102,129],"time,":[79],"poor":[81],"co-verification":[84],"ability":[85,145],"software":[87,147],"hardware.":[89],"Therefore,":[90,151],"many":[91],"institutions":[92],"have":[93],"carried":[94],"out":[95],"research":[96],"on":[97,174,271],"by":[104,116],"using":[105],"SystemC":[106,117,141,152],"language.":[107],"While":[108],"TLM(Transaction":[110],"Level":[111],"Modeling)":[112],"developed":[115],"abstract,":[121],"shorter,":[126],"at":[132],"least":[133],"10":[134],"times":[135],"faster":[136],"than":[137,241],"RTL":[138],"level.":[139],"Moreover,":[140],"has":[143,157],"outstanding":[144],"hardware":[149],"co-verification.":[150],"method":[156,168,248],"gradually":[158],"become":[159],"mainstream":[161],"industry.":[163],"This":[164,247],"paper":[165],"presents":[166],"based":[173,270],"SystemC.":[175],"The":[176],"AMBA(Advanced":[179],"Microcontroller":[180],"Bus":[181],"Architecture)":[182],"architecture":[183],"through":[184],"AXI(Advanced":[185],"eXtensible":[186],"Interface)":[187],"APB(Advanced":[189],"Peripheral":[190],"Bus)":[191],"protocols":[192],"performed.":[194],"It":[195],"also":[196],"includes":[197],"NoC(network-on-chip)":[199],"module":[200,305],"named":[201],"AXI_NOC":[202,254],"that":[203,294],"provides":[204],"network":[205],"interfaces":[206],"packet-switched":[208],"communications":[209],"for":[210],"slaves.":[211],"In":[212,228],"coordinate":[215],"data":[217,224,232,245],"transmission":[218,251],"within":[219],"each":[220,229],"module,":[221,230],"an":[222],"open":[223],"structure":[225,233],"defined.":[227],"package":[234],"transmit":[238],"data,":[239],"rather":[240],"respective":[243],"protocol":[244],"format.":[246],"unifies":[249],"specification.":[252],"AXI,":[253,301],"APB":[256],"modules":[257,277],"are":[258],"all":[259],"transaction":[260],"with":[263],"periodicity":[264],"accuracy.":[265],"Finally,":[266],"platform":[269],"UVM-SystemC":[272],"validate":[274],"test":[276],"designed.":[279],"After":[280],"analyzing":[281],"print":[283],"information":[284],"waveform":[287],"platform,":[291],"conclusion":[293],"accuracy":[296],"APB,":[302],"AXI_":[303],"NOC":[304],"abtained.":[307]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
