{"id":"https://openalex.org/W4375852253","doi":"https://doi.org/10.1145/3576914.3587510","title":"EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators","display_name":"EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators","publication_year":2023,"publication_date":"2023-05-08","ids":{"openalex":"https://openalex.org/W4375852253","doi":"https://doi.org/10.1145/3576914.3587510"},"language":"en","primary_location":{"id":"doi:10.1145/3576914.3587510","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3576914.3587510","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3576914.3587510","source":null,"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of Cyber-Physical Systems and Internet of Things Week 2023","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3576914.3587510","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080149424","display_name":"Kuan-Lin Chiu","orcid":"https://orcid.org/0000-0002-4892-9711"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kuan-Lin Chiu","raw_affiliation_strings":["Columbia University, USA"],"raw_orcid":"https://orcid.org/0000-0002-4892-9711","affiliations":[{"raw_affiliation_string":"Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064509408","display_name":"Guy Eichler","orcid":"https://orcid.org/0000-0003-3793-1872"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Guy Eichler","raw_affiliation_strings":["Columbia University, USA"],"raw_orcid":"https://orcid.org/0000-0003-3793-1872","affiliations":[{"raw_affiliation_string":"Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042344201","display_name":"Biruk Seyoum","orcid":"https://orcid.org/0000-0001-5399-2590"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Biruk Seyoum","raw_affiliation_strings":["Columbia University, USA"],"raw_orcid":"https://orcid.org/0000-0001-5399-2590","affiliations":[{"raw_affiliation_string":"Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009992367","display_name":"Luca P. Carloni","orcid":"https://orcid.org/0000-0001-5600-8931"},"institutions":[{"id":"https://openalex.org/I78577930","display_name":"Columbia University","ror":"https://ror.org/00hj8s172","country_code":"US","type":"education","lineage":["https://openalex.org/I78577930"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Luca Carloni","raw_affiliation_strings":["Columbia University, USA"],"raw_orcid":"https://orcid.org/0000-0001-5600-8931","affiliations":[{"raw_affiliation_string":"Columbia University, USA","institution_ids":["https://openalex.org/I78577930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78577930"],"apc_list":null,"apc_paid":null,"fwci":0.4173,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.52565881,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"209","last_page":"214"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8120459318161011},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6348035335540771},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5753354430198669},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5618044137954712},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5512682199478149},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.47228795289993286},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4666668772697449},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4637969136238098},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4282992482185364},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.35897916555404663},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34934890270233154},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25610530376434326}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8120459318161011},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6348035335540771},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5753354430198669},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5618044137954712},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5512682199478149},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.47228795289993286},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4666668772697449},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4637969136238098},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4282992482185364},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.35897916555404663},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34934890270233154},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25610530376434326},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3576914.3587510","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3576914.3587510","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3576914.3587510","source":null,"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of Cyber-Physical Systems and Internet of Things Week 2023","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3576914.3587510","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3576914.3587510","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3576914.3587510","source":null,"license":"public-domain","license_id":"https://openalex.org/licenses/public-domain","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of Cyber-Physical Systems and Internet of Things Week 2023","raw_type":"proceedings-article"},"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G5648443231","display_name":"SHF : Medium : Collaborative Research: Decentralized On-Chip Infrastructure for Robustness and Portability in Heterogeneous Multicores","funder_award_id":"1764000","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4375852253.pdf","grobid_xml":"https://content.openalex.org/works/W4375852253.grobid-xml"},"referenced_works_count":26,"referenced_works":["https://openalex.org/W2020934227","https://openalex.org/W2116037861","https://openalex.org/W2397193845","https://openalex.org/W2732012689","https://openalex.org/W2768475350","https://openalex.org/W2793532013","https://openalex.org/W2802709486","https://openalex.org/W2897521775","https://openalex.org/W2946758900","https://openalex.org/W2975291694","https://openalex.org/W2990790219","https://openalex.org/W3004209930","https://openalex.org/W3012480484","https://openalex.org/W3018835489","https://openalex.org/W3041051645","https://openalex.org/W3081627712","https://openalex.org/W3115857154","https://openalex.org/W3116643785","https://openalex.org/W3142170088","https://openalex.org/W3153263805","https://openalex.org/W3203860240","https://openalex.org/W3204828112","https://openalex.org/W3206924710","https://openalex.org/W4200243368","https://openalex.org/W4221150462","https://openalex.org/W4247402800"],"related_works":["https://openalex.org/W2538644970","https://openalex.org/W4376881175","https://openalex.org/W4310584696","https://openalex.org/W4385730960","https://openalex.org/W4237840813","https://openalex.org/W4364295250","https://openalex.org/W2128502296","https://openalex.org/W2993622674","https://openalex.org/W1833044483","https://openalex.org/W4401753390"],"abstract_inverted_index":{"An":[0],"important":[1],"goal":[2],"in":[3,47],"the":[4,10,48,57,63,82,88,133,158],"field":[5],"of":[6,41,65,84],"real-time":[7,85,113],"computation":[8,86],"at":[9,87],"edge":[11],"is":[12,54],"to":[13,29,55,131],"achieve":[14],"balance":[15],"between":[16,59],"low-latency":[17],"requirements":[18],"and":[19,39,75,112,137,152],"strict":[20],"low-power":[21],"constraints.":[22],"Into":[23],"this":[24],"equation,":[25],"we":[26,144],"would":[27],"like":[28],"incorporate":[30],"simple":[31],"Application":[32],"Programming":[33],"Interfaces":[34],"(APIs)":[35],"for":[36,81],"software":[37,98,163],"development":[38],"utilization":[40],"open-source":[42,105,124],"IPs":[43],"that":[44,61,96,108,128,146],"encourage":[45],"reusability":[46],"public":[49],"domain.":[50],"One":[51],"big":[52],"challenge":[53],"bridge":[56],"gap":[58],"APIs":[60],"simplify":[62],"implementation":[64],"complex":[66],"algorithms":[67],"but":[68],"mostly":[69],"rely":[70],"on":[71,115],"CPU-centric":[72],"computing":[73],"paradigms,":[74],"lightweight":[76],"heterogeneous":[77,116],"hardware":[78,139],"architectures":[79],"designed":[80,100],"constraints":[83],"edge.":[89],"We":[90,120],"introduce":[91],"a":[92,103],"hardware/software":[93],"co-design":[94],"approach":[95,148],"combines":[97],"applications":[99],"with":[101],"Eigen,":[102],"powerful":[104],"C++":[106],"library":[107],"abstracts":[109],"linear-algebra":[110],"workloads,":[111],"execution":[114],"System-on-Chip":[117],"(SoC)":[118],"architectures.":[119],"use":[121],"ESP,":[122],"an":[123],"SoC":[125],"design":[126],"platform":[127],"allows":[129],"us":[130],"integrate":[132],"CVA6":[134],"RISC-V":[135],"processor":[136],"custom":[138],"accelerators.":[140],"With":[141],"FPGA-based":[142],"experiments,":[143],"show":[145],"our":[147],"provides":[149],"significant":[150],"performance":[151],"energy":[153],"efficiency":[154],"gains,":[155],"while":[156],"maintaining":[157],"simplification":[159],"provided":[160],"by":[161],"high-level":[162],"development.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-07-31T08:31:51.225901","created_date":"2025-10-10T00:00:00"}
