{"id":"https://openalex.org/W4318685705","doi":"https://doi.org/10.1145/3566097.3568359","title":"Hardware-Software Co-Design for On-Chip Learning in AI Systems","display_name":"Hardware-Software Co-Design for On-Chip Learning in AI Systems","publication_year":2023,"publication_date":"2023-01-16","ids":{"openalex":"https://openalex.org/W4318685705","doi":"https://doi.org/10.1145/3566097.3568359"},"language":"en","primary_location":{"id":"doi:10.1145/3566097.3568359","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3566097.3568359","pdf_url":null,"source":{"id":"https://openalex.org/S4363608968","display_name":"Proceedings of the 28th Asia and South Pacific Design Automation Conference","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 28th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038371871","display_name":"M. Lakshmi Varshika","orcid":null},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"M. L. Varshika","raw_affiliation_strings":["Drexel University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Drexel University","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103109673","display_name":"Abhishek Kumar Mishra","orcid":"https://orcid.org/0000-0002-2392-835X"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abhishek Kumar Mishra","raw_affiliation_strings":["Drexel University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Drexel University","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007957626","display_name":"Nagarajan Kandasamy","orcid":"https://orcid.org/0000-0002-4224-6362"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagarajan Kandasamy","raw_affiliation_strings":["Drexel University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Drexel University","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052267211","display_name":"Anup Das","orcid":"https://orcid.org/0000-0002-5673-2636"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anup Das","raw_affiliation_strings":["Drexel University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Drexel University","institution_ids":["https://openalex.org/I72816309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5038371871"],"corresponding_institution_ids":["https://openalex.org/I72816309"],"apc_list":null,"apc_paid":null,"fwci":5.338,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.96215596,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"624","last_page":"631"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7836798429489136},{"id":"https://openalex.org/keywords/convolutional-neural-network","display_name":"Convolutional neural network","score":0.5809288620948792},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5718326568603516},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5451069474220276},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5315717458724976},{"id":"https://openalex.org/keywords/tile","display_name":"Tile","score":0.5135645866394043},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.4997992515563965},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45185625553131104},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45181822776794434},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.4311273396015167},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.42993348836898804},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.40777990221977234},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.38963931798934937},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37682151794433594}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7836798429489136},{"id":"https://openalex.org/C81363708","wikidata":"https://www.wikidata.org/wiki/Q17084460","display_name":"Convolutional neural network","level":2,"score":0.5809288620948792},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5718326568603516},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5451069474220276},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5315717458724976},{"id":"https://openalex.org/C2780728851","wikidata":"https://www.wikidata.org/wiki/Q468402","display_name":"Tile","level":2,"score":0.5135645866394043},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.4997992515563965},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45185625553131104},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45181822776794434},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.4311273396015167},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.42993348836898804},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.40777990221977234},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.38963931798934937},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37682151794433594},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3566097.3568359","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3566097.3568359","pdf_url":null,"source":{"id":"https://openalex.org/S4363608968","display_name":"Proceedings of the 28th Asia and South Pacific Design Automation Conference","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 28th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1975398991","https://openalex.org/W2045614943","https://openalex.org/W2065865627","https://openalex.org/W2091158003","https://openalex.org/W2107433900","https://openalex.org/W2112927743","https://openalex.org/W2130360162","https://openalex.org/W2158083362","https://openalex.org/W2159951683","https://openalex.org/W2163630896","https://openalex.org/W2290475758","https://openalex.org/W2560615381","https://openalex.org/W2749445606","https://openalex.org/W2758905644","https://openalex.org/W2767086638","https://openalex.org/W2779025322","https://openalex.org/W2783525259","https://openalex.org/W2798763859","https://openalex.org/W2904922094","https://openalex.org/W2944996566","https://openalex.org/W2945174502","https://openalex.org/W2964338223","https://openalex.org/W2971963594","https://openalex.org/W2989683650","https://openalex.org/W3105271230","https://openalex.org/W3134426955","https://openalex.org/W3205332351","https://openalex.org/W4247624284","https://openalex.org/W4255992566","https://openalex.org/W4298042782","https://openalex.org/W4323927861"],"related_works":["https://openalex.org/W2114959296","https://openalex.org/W38346124","https://openalex.org/W2502442966","https://openalex.org/W2138666621","https://openalex.org/W2383936314","https://openalex.org/W1992771654","https://openalex.org/W2022661278","https://openalex.org/W2777914781","https://openalex.org/W4246369972","https://openalex.org/W4244869112"],"abstract_inverted_index":{"Spike-based":[0],"convolutional":[1],"neural":[2,53],"networks":[3],"(CNNs)":[4],"are":[5,103,125],"empowered":[6],"with":[7,42],"on-chip":[8,43,68],"learning":[9,44,69],"in":[10,26,48,78],"their":[11],"convolution":[12,59,80],"layers,":[13],"enabling":[14],"the":[15,27,79,115,122,146,150,162,183,202],"layer":[16],"to":[17,19,57,72,88,117,139,143,160,208],"learn":[18],"detect":[20],"features":[21],"by":[22],"combining":[23],"those":[24],"extracted":[25],"previous":[28],"layer.":[29],"We":[30,134,148],"propose":[31,135],"ECHELON,":[32,144],"a":[33,38,52,64,83,106,129,136,157,168,186,189],"generalized":[34],"design":[35,152],"template":[36],"for":[37,167],"tile-based":[39],"neuromorphic":[40],"hardware":[41,151,163,210],"capabilities.":[45],"Each":[46],"tile":[47,101,187],"ECHELON":[49],"consists":[50],"of":[51,63,185,204],"processing":[54],"units":[55],"(NPU)":[56],"implement":[58,89],"and":[60,82,97,112,153,164,174,191],"dense":[61],"layers":[62],"CNN":[65,91,141,198],"model,":[66],"an":[67],"unit":[70,86],"(OLU)":[71],"facilitate":[73,118],"spike-timing":[74],"dependent":[75],"plasticity":[76],"(STDP)":[77],"layer,":[81],"special":[84],"function":[85],"(SFU)":[87],"other":[90],"functions":[92],"such":[93],"as":[94],"pooling,":[95],"concatenation,":[96],"residual":[98],"computation.":[99],"These":[100],"resources":[102],"interconnected":[104,127],"using":[105,128],"shared":[107],"bus,":[108],"which":[109],"is":[110],"segmented":[111],"configured":[113],"via":[114],"software":[116,138,154,165],"parallel":[119],"communication":[120],"inside":[121],"tile.":[123],"Tiles":[124],"themselves":[126],"classical":[130],"Network-on-Chip":[131],"(NoC)":[132],"interconnect.":[133],"system":[137],"map":[140],"models":[142],"maximizing":[145],"performance.":[147],"integrate":[149],"optimization":[155],"within":[156],"co-design":[158,206],"loop":[159],"obtain":[161],"architectures":[166],"target":[169],"CNN,":[170],"satisfying":[171],"both":[172],"performance":[173],"resource":[175],"constraints.":[176],"In":[177],"this":[178],"preliminary":[179],"work,":[180],"we":[181,200],"show":[182,201],"implementation":[184],"on":[188],"FPGA":[190],"some":[192],"early":[193],"evaluations.":[194],"Using":[195],"8":[196],"STDP-enabled":[197],"models,":[199],"potential":[203],"our":[205],"methodology":[207],"optimize":[209],"resources.":[211]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4}],"updated_date":"2026-04-29T09:16:38.111599","created_date":"2025-10-10T00:00:00"}
