{"id":"https://openalex.org/W4318256895","doi":"https://doi.org/10.1145/3557988.3569714","title":"A Machine Learning Approach for Accelerating SimPL-Based Global Placement for FPGA's","display_name":"A Machine Learning Approach for Accelerating SimPL-Based Global Placement for FPGA's","publication_year":2022,"publication_date":"2022-11-03","ids":{"openalex":"https://openalex.org/W4318256895","doi":"https://doi.org/10.1145/3557988.3569714"},"language":"en","primary_location":{"id":"doi:10.1145/3557988.3569714","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3557988.3569714","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3557988.3569714","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3557988.3569714","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041252864","display_name":"Tianyi Yu","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Tianyi Yu","raw_affiliation_strings":["University of Toronto, Toronto, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Toronto, Toronto, Ontario, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013292154","display_name":"Nima Karimpour Darav","orcid":"https://orcid.org/0000-0003-2935-3558"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Nima Karimpour Darav","raw_affiliation_strings":["Advanced Micro Devices, Inc., Markham, Ontario, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc., Markham, Ontario, Canada","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080828363","display_name":"Ismail Bustany","orcid":"https://orcid.org/0000-0002-7099-1546"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Ismail Bustany","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069832936","display_name":"Mehrdad Eslami Dehkordi","orcid":"https://orcid.org/0000-0001-7663-4059"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Mehrdad Eslami Dehkordi","raw_affiliation_strings":["Advanced Micro Devices, Inc"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc","institution_ids":["https://openalex.org/I1311921367"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1294661,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8319487571716309},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7971632480621338},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.49036741256713867},{"id":"https://openalex.org/keywords/upper-and-lower-bounds","display_name":"Upper and lower bounds","score":0.4622589647769928},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.44918665289878845},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.41553983092308044},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.331499844789505},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2720736563205719},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1279081404209137},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10781773924827576},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.10082301497459412}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8319487571716309},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7971632480621338},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.49036741256713867},{"id":"https://openalex.org/C77553402","wikidata":"https://www.wikidata.org/wiki/Q13222579","display_name":"Upper and lower bounds","level":2,"score":0.4622589647769928},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.44918665289878845},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.41553983092308044},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.331499844789505},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2720736563205719},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1279081404209137},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10781773924827576},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.10082301497459412},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3557988.3569714","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3557988.3569714","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3557988.3569714","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3557988.3569714","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3557988.3569714","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3557988.3569714","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 24th ACM/IEEE Workshop on System Level Interconnect Pathfinding","raw_type":"proceedings-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6200000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1986026297","https://openalex.org/W2014070364","https://openalex.org/W2018721259","https://openalex.org/W2075137913","https://openalex.org/W2132693178","https://openalex.org/W2139637699","https://openalex.org/W2154014710","https://openalex.org/W2328615082","https://openalex.org/W2336236367","https://openalex.org/W2533722497","https://openalex.org/W2535860792","https://openalex.org/W2595334824","https://openalex.org/W2738078952","https://openalex.org/W2917241406","https://openalex.org/W2997871849"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W2316202402","https://openalex.org/W2373535795","https://openalex.org/W2082487009","https://openalex.org/W3103262449","https://openalex.org/W3130402546"],"abstract_inverted_index":{"Many":[0],"commercial":[1],"FPGA":[2,39,103],"placement":[3],"tools":[4],"are":[5,79],"based":[6],"on":[7,50,126,133],"the":[8,12,27,37,42,45,54,74,84,92,141,147,150,156],"SimPL":[9,43],"framework":[10],"where":[11,73],"Lower":[13],"Bound":[14,29],"(LB)":[15],"phase":[16,31],"optimizes":[17],"wire":[18],"length":[19],"and":[20,26,53,99,136,146],"timing":[21],"without":[22],"considering":[23,36],"cell":[24],"overlaps":[25],"Upper":[28],"(UB)":[30],"spreads":[32],"out":[33],"cells":[34,78],"while":[35,154],"target":[38],"architectures.":[40],"In":[41,63,96],"framework,":[44],"number":[46,93],"of":[47,56,77,94,143,149,158],"iterations":[48],"depends":[49],"design":[51],"complexity":[52],"quality":[55,157],"UB":[57],"placement,":[58],"which":[59],"highly":[60],"impacts":[61],"runtime.":[62],"this":[64],"work,":[65],"we":[66,130],"propose":[67],"a":[68,88,101,105,109],"machine":[69],"learning":[70],"(ML)":[71],"scheme":[72],"anchor":[75,118],"weights":[76,119],"dynamically":[80],"adjusted":[81],"to":[82],"make":[83],"process":[85],"converge":[86],"in":[87,140],"pre-determined":[89],"budget":[90],"for":[91,100,116],"iterations.":[95,122],"our":[97],"approach":[98],"given":[102],"architecture,":[104],"ML":[106],"model":[107],"constructs":[108],"trajectory":[110],"guide":[111],"function":[112],"that":[113],"is":[114],"used":[115],"adjusting":[117],"during":[120],"SimPL's":[121],"Our":[123],"experimental":[124],"results":[125],"industrial":[127],"benchmarks":[128],"show,":[129],"can":[131],"achieve":[132],"average":[134],"28.01%":[135],"4.7%":[137],"runtime":[138,142,148],"reduction":[139],"Global":[144],"Placement":[145],"whole":[151],"placer,":[152],"respectively":[153],"maintaining":[155],"solutions":[159],"within":[160],"an":[161],"acceptable":[162],"range.":[163]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}