{"id":"https://openalex.org/W4320067873","doi":"https://doi.org/10.1145/3547276.3548515","title":"The Support of MLIR HLS Adaptor for LLVM IR","display_name":"The Support of MLIR HLS Adaptor for LLVM IR","publication_year":2022,"publication_date":"2022-08-29","ids":{"openalex":"https://openalex.org/W4320067873","doi":"https://doi.org/10.1145/3547276.3548515"},"language":"en","primary_location":{"id":"doi:10.1145/3547276.3548515","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3547276.3548515","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Workshop Proceedings of the 51st International Conference on Parallel Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076552979","display_name":"Geng-Ming Liang","orcid":"https://orcid.org/0000-0002-9940-7542"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Geng-Ming Liang","raw_affiliation_strings":["National Tsing Hua University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075355288","display_name":"Chuan-Yue Yuan","orcid":null},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chuan-Yue Yuan","raw_affiliation_strings":["National Tsing Hua University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058163038","display_name":"Meng-Shiun Yu","orcid":"https://orcid.org/0000-0002-0471-0216"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Shiun Yu","raw_affiliation_strings":["National Tsing Hua University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102800860","display_name":"Tai-Liang Chen","orcid":"https://orcid.org/0000-0002-3347-8161"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tai-Liang Chen","raw_affiliation_strings":["National Tsing Hua University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040715141","display_name":"Kuan-Hsun Chen","orcid":"https://orcid.org/0000-0002-7110-921X"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Kuan-Hsun Chen","raw_affiliation_strings":["University of Twente, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Twente, Taiwan","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038803698","display_name":"Jenq\u2010Kuen Lee","orcid":"https://orcid.org/0000-0001-9919-6258"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jenq-Kuen Lee","raw_affiliation_strings":["National Tsing Hua University, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Taiwan","institution_ids":["https://openalex.org/I25846049"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4666,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.6344086,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7997003197669983},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.6797744035720825},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6485574245452881},{"id":"https://openalex.org/keywords/abstraction-layer","display_name":"Abstraction layer","score":0.4353156089782715},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4321081042289734},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37568679451942444},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.33360645174980164},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3205080032348633},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.22120344638824463},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1700824797153473}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7997003197669983},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.6797744035720825},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6485574245452881},{"id":"https://openalex.org/C147358964","wikidata":"https://www.wikidata.org/wiki/Q1200992","display_name":"Abstraction layer","level":3,"score":0.4353156089782715},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4321081042289734},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37568679451942444},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.33360645174980164},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3205080032348633},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.22120344638824463},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1700824797153473},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/3547276.3548515","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3547276.3548515","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Workshop Proceedings of the 51st International Conference on Parallel Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:openaire_cris_publications/c13bd558-10db-4f63-a8f4-d088ad4f5d3b","is_oa":false,"landing_page_url":"https://research.utwente.nl/en/publications/c13bd558-10db-4f63-a8f4-d088ad4f5d3b","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Liang, G M, Yuan, C Y, Yuan, M S, Chen, T L, Chen, K H & Lee, J K 2023, The Support of MLIR HLS Adaptor for LLVM IR. in ICPP Workshops '22: Workshop Proceedings of the 51st International Conference on Parallel Processing., 12, ACM International Conference Proceeding Series, Association for Computing Machinery, New York, NY, pp. 1-8, 51st International Conference on Parallel Processing, ICPP 2022, Bordeaux, France, 29/08/22. https://doi.org/10.1145/3547276.3548515","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:ris.utwente.nl:publications/c13bd558-10db-4f63-a8f4-d088ad4f5d3b","is_oa":false,"landing_page_url":"http://www.scopus.com/inward/record.url?scp=85147421186&partnerID=8YFLogxK","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Liang, G M, Yuan, C Y, Yuan, M S, Chen, T L, Chen, K H & Lee, J K 2023, The Support of MLIR HLS Adaptor for LLVM IR. in ICPP Workshops '22: Workshop Proceedings of the 51st International Conference on Parallel Processing., 12, ACM International Conference Proceeding Series, Association for Computing Machinery, New York, NY, pp. 1-8, 51st International Conference on Parallel Processing, ICPP 2022, Bordeaux, France, 29/08/22. https://doi.org/10.1145/3547276.3548515","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2166029537","https://openalex.org/W2741830349","https://openalex.org/W2803281868","https://openalex.org/W2970971581","https://openalex.org/W3133347161","https://openalex.org/W3206908800","https://openalex.org/W4246166885","https://openalex.org/W4285171882","https://openalex.org/W4293025825"],"related_works":["https://openalex.org/W3160136729","https://openalex.org/W2159874819","https://openalex.org/W2171318521","https://openalex.org/W2085480040","https://openalex.org/W2904693267","https://openalex.org/W1965788443","https://openalex.org/W1989867497","https://openalex.org/W2000188956","https://openalex.org/W4245162945","https://openalex.org/W2341934347"],"abstract_inverted_index":{"Since":[0],"the":[1,16,86,96,115,127],"emergence":[2],"of":[3,33,98],"MLIR,":[4,90],"High-level":[5],"Synthesis":[6],"(HLS)":[7],"tools":[8,19,47,132],"started":[9],"to":[10,40,54,66],"design":[11],"in":[12,30],"multi-level":[13],"abstractions.":[14],"Unlike":[15],"traditional":[17],"HLS":[18,46,52,92,131,134,145],"that":[20,59,114],"are":[21],"based":[22],"on":[23,107],"a":[24,60],"single":[25],"abstraction":[26,34],"(e.g.":[27],"LLVM),":[28],"optimizations":[29,39],"different":[31,102],"levels":[32],"could":[35,105],"benefit":[36],"from":[37,64,89],"cross-layer":[38],"get":[41],"better":[42],"results.":[43],"Although":[44],"current":[45],"with":[48,126,141],"MLIR":[49,65,116,130],"can":[50,84,121],"generate":[51,122],"C/C++":[53],"do":[55],"synthesis,":[56],"we":[57,76],"believe":[58],"direct":[61],"IR":[62],"transformation":[63],"LLVM":[67,81],"will":[68],"keep":[69],"more":[70],"expression":[71],"details.":[72],"In":[73],"this":[74],"paper,":[75],"propose":[77],"an":[78],"adaptor":[79,120],"for":[80],"IR,":[82,87],"which":[83],"optimize":[85],"generated":[88],"into":[91],"readable":[93],"IR.":[94],"Without":[95],"gap":[97],"unsupported":[99],"syntax":[100],"between":[101],"versions,":[103],"developers":[104],"focus":[106],"their":[108],"specialization.":[109],"Our":[110],"preliminary":[111],"results":[112,125],"show":[113],"flow":[117],"via":[118],"our":[119],"comparable":[123],"performance":[124],"version":[128],"by":[129],"generating":[133],"C++":[135],"codes.":[136],"The":[137],"experiment":[138],"is":[139],"performed":[140],"Xilinx":[142],"Vitis":[143],"and":[144],"tools.":[146]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}