{"id":"https://openalex.org/W4319870505","doi":"https://doi.org/10.1145/3543622.3573180","title":"ACTS: A Near-Memory FPGA Graph Processing Framework","display_name":"ACTS: A Near-Memory FPGA Graph Processing Framework","publication_year":2023,"publication_date":"2023-02-10","ids":{"openalex":"https://openalex.org/W4319870505","doi":"https://doi.org/10.1145/3543622.3573180"},"language":"en","primary_location":{"id":"doi:10.1145/3543622.3573180","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3543622.3573180","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3543622.3573180","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3543622.3573180","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081104459","display_name":"Oluwole Jaiyeoba","orcid":"https://orcid.org/0000-0002-9765-3475"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wole Jaiyeoba","raw_affiliation_strings":["University of Virginia, Charlottesville, VA, USA"],"raw_orcid":"https://orcid.org/0000-0002-9765-3475","affiliations":[{"raw_affiliation_string":"University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009902021","display_name":"Nima Elyasi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101778","display_name":"Samsung (United States)","ror":"https://ror.org/01bfbvm65","country_code":"US","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210101778"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nima Elyasi","raw_affiliation_strings":["Samsung, San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0000-0003-0349-1119","affiliations":[{"raw_affiliation_string":"Samsung, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210101778"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101832335","display_name":"Changho Choi","orcid":"https://orcid.org/0000-0002-4377-5418"},"institutions":[{"id":"https://openalex.org/I4210101778","display_name":"Samsung (United States)","ror":"https://ror.org/01bfbvm65","country_code":"US","type":"company","lineage":["https://openalex.org/I2250650973","https://openalex.org/I4210101778"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Changho Choi","raw_affiliation_strings":["Samsung, San Jose, CA, USA"],"raw_orcid":"https://orcid.org/0000-0002-4377-5418","affiliations":[{"raw_affiliation_string":"Samsung, San Jose, CA, USA","institution_ids":["https://openalex.org/I4210101778"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074818897","display_name":"Kevin Skadron","orcid":"https://orcid.org/0000-0002-8091-9302"},"institutions":[{"id":"https://openalex.org/I51556381","display_name":"University of Virginia","ror":"https://ror.org/0153tk833","country_code":"US","type":"education","lineage":["https://openalex.org/I51556381"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kevin Skadron","raw_affiliation_strings":["University of Virginia, Charlottesville, VA, USA"],"raw_orcid":"https://orcid.org/0000-0002-8091-9302","affiliations":[{"raw_affiliation_string":"University of Virginia, Charlottesville, VA, USA","institution_ids":["https://openalex.org/I51556381"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2351,"has_fulltext":true,"cited_by_count":11,"citation_normalized_percentile":{"value":0.81122881,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"79","last_page":"89"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12292","display_name":"Graph Theory and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12292","display_name":"Graph Theory and Algorithms","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8535674214363098},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6378597021102905},{"id":"https://openalex.org/keywords/graph-traversal","display_name":"Graph traversal","score":0.591400146484375},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.41356828808784485},{"id":"https://openalex.org/keywords/graph-partition","display_name":"Graph partition","score":0.4133855700492859},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3856792151927948}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8535674214363098},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6378597021102905},{"id":"https://openalex.org/C96333769","wikidata":"https://www.wikidata.org/wiki/Q907955","display_name":"Graph traversal","level":3,"score":0.591400146484375},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.41356828808784485},{"id":"https://openalex.org/C48903430","wikidata":"https://www.wikidata.org/wiki/Q491370","display_name":"Graph partition","level":3,"score":0.4133855700492859},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3856792151927948}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3543622.3573180","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3543622.3573180","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3543622.3573180","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3543622.3573180","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3543622.3573180","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3543622.3573180","source":null,"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G8724563612","display_name":null,"funder_award_id":"FA8075-21-F-0013","funder_id":"https://openalex.org/F4320307910","funder_display_name":"Booz Allen Hamilton"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320307910","display_name":"Booz Allen Hamilton","ror":"https://ror.org/051rcp357"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4319870505.pdf","grobid_xml":"https://content.openalex.org/works/W4319870505.grobid-xml"},"referenced_works_count":30,"referenced_works":["https://openalex.org/W1482680420","https://openalex.org/W1783256592","https://openalex.org/W2008668719","https://openalex.org/W2026354831","https://openalex.org/W2035080386","https://openalex.org/W2040007391","https://openalex.org/W2046833425","https://openalex.org/W2053076698","https://openalex.org/W2061820396","https://openalex.org/W2152872804","https://openalex.org/W2282294254","https://openalex.org/W2432978112","https://openalex.org/W2508029414","https://openalex.org/W2584785188","https://openalex.org/W2588542619","https://openalex.org/W2591957553","https://openalex.org/W2730999914","https://openalex.org/W2884144908","https://openalex.org/W2884496840","https://openalex.org/W2914631005","https://openalex.org/W2951135776","https://openalex.org/W2962865652","https://openalex.org/W2973152414","https://openalex.org/W3132871189","https://openalex.org/W3187809022","https://openalex.org/W3198975860","https://openalex.org/W3216389237","https://openalex.org/W4200197440","https://openalex.org/W4235101327","https://openalex.org/W4241140669"],"related_works":["https://openalex.org/W2171531069","https://openalex.org/W1523456381","https://openalex.org/W4252596799","https://openalex.org/W244044452","https://openalex.org/W2250131350","https://openalex.org/W4302767918","https://openalex.org/W2964104333","https://openalex.org/W2894324541","https://openalex.org/W3124763131","https://openalex.org/W2738095401"],"abstract_inverted_index":{"Despite":[0],"the":[1,66,97],"high":[2],"off-chip":[3],"bandwidth":[4,29,56],"and":[5,15,50,58,137],"on-chip":[6,62,68],"parallelism":[7],"offered":[8],"by":[9,44],"today's":[10],"near-memory":[11],"accelerators,":[12],"software-based":[13],"(CPU":[14],"GPU)":[16],"graph":[17,31,39,47,75,85,114,124],"processing":[18,48],"frameworks":[19],"still":[20],"suffer":[21],"performance":[22,103,130],"degradation":[23,131],"from":[24],"under-utilization":[25],"of":[26,84],"available":[27],"memory":[28,52,70],"because":[30],"traversal":[32],"often":[33],"exhibits":[34],"poor":[35],"locality.":[36],"Emerging":[37],"FPGAbased":[38,78],"accelerators":[40],"tackle":[41],"this":[42,100,108],"challenge":[43],"designing":[45],"specialized":[46],"pipelines":[49],"application-specific":[51],"subsystems":[53],"to":[54,81,91,128],"maximize":[55],"utilization":[57],"efficiently":[59],"utilize":[60],"high-speed":[61],"memory.":[63],"To":[64],"use":[65],"limited":[67],"(BRAM)":[69],"effectively":[71],"while":[72],"handling":[73],"larger":[74,113],"sizes,":[76],"several":[77],"solutions":[79],"resort":[80],"some":[82],"form":[83],"slicing":[86],"or":[87],"partitioning":[88],"during":[89],"preprocessing":[90],"stage":[92],"vertex":[93],"property":[94],"data":[95],"into":[96],"BRAM.":[98],"While":[99],"has":[101],"demonstrated":[102],"superiority":[104],"for":[105,146],"small":[106],"graphs,":[107],"approach":[109],"breaks":[110],"down":[111],"with":[112],"sizes.":[115],"For":[116],"example,":[117],"GraphLily":[118],"[19],":[119],"a":[120],"recent":[121],"high-performance":[122],"FPGA-based":[123],"accelerator,":[125],"experiences":[126],"up":[127],"11X":[129],"between":[132],"graphs":[133],"having":[134],"3M":[135],"vertices":[136],"28M":[138],"vertices.":[139],"This":[140],"makes":[141],"prior":[142],"FPGA":[143],"approaches":[144],"impractical":[145],"large":[147],"graphs.":[148]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}