{"id":"https://openalex.org/W4281736571","doi":"https://doi.org/10.1145/3526241.3530349","title":"MnM: A Fast and Efficient Min/Max Searching in MRAM","display_name":"MnM: A Fast and Efficient Min/Max Searching in MRAM","publication_year":2022,"publication_date":"2022-06-02","ids":{"openalex":"https://openalex.org/W4281736571","doi":"https://doi.org/10.1145/3526241.3530349"},"language":"en","primary_location":{"id":"doi:10.1145/3526241.3530349","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3526241.3530349","pdf_url":null,"source":{"id":"https://openalex.org/S4363608736","display_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050934336","display_name":"Amitesh Sridharan","orcid":"https://orcid.org/0009-0005-5620-9385"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Amitesh Sridharan","raw_affiliation_strings":["Arizona State University, Tempe, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074715434","display_name":"Fan Zhang","orcid":"https://orcid.org/0000-0002-6823-2700"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fan Zhang","raw_affiliation_strings":["Arizona State University, Tempe, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5047916979","display_name":"Deliang Fan","orcid":"https://orcid.org/0000-0002-7989-6297"},"institutions":[{"id":"https://openalex.org/I55732556","display_name":"Arizona State University","ror":"https://ror.org/03efmqc40","country_code":"US","type":"education","lineage":["https://openalex.org/I55732556"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Deliang Fan","raw_affiliation_strings":["Arizona State University, Tempe, AZ, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Arizona State University, Tempe, AZ, USA","institution_ids":["https://openalex.org/I55732556"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I55732556"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"53","issue":null,"first_page":"39","last_page":"44"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11612","display_name":"Stochastic Gradient Optimization Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.8355650901794434},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7190446257591248},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.5333402752876282},{"id":"https://openalex.org/keywords/xnor-gate","display_name":"XNOR gate","score":0.5098661184310913},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5088303685188293},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.4397374987602234},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4371471107006073},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.401019424200058},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39220771193504333},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3666597306728363},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.3051581382751465},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24301770329475403},{"id":"https://openalex.org/keywords/nand-gate","display_name":"NAND gate","score":0.16713964939117432},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.1663459837436676}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.8355650901794434},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7190446257591248},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5333402752876282},{"id":"https://openalex.org/C57684291","wikidata":"https://www.wikidata.org/wiki/Q1336142","display_name":"XNOR gate","level":4,"score":0.5098661184310913},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5088303685188293},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.4397374987602234},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4371471107006073},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.401019424200058},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39220771193504333},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3666597306728363},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.3051581382751465},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24301770329475403},{"id":"https://openalex.org/C124296912","wikidata":"https://www.wikidata.org/wiki/Q575178","display_name":"NAND gate","level":3,"score":0.16713964939117432},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.1663459837436676},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3526241.3530349","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3526241.3530349","pdf_url":null,"source":{"id":"https://openalex.org/S4363608736","display_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the Great Lakes Symposium on VLSI 2022","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.44999998807907104,"id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G7684248411","display_name":null,"funder_award_id":"No.2003749 No. 2144751","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1977516301","https://openalex.org/W2006232962","https://openalex.org/W2010202670","https://openalex.org/W2035080386","https://openalex.org/W2092330486","https://openalex.org/W2125693020","https://openalex.org/W2148256155","https://openalex.org/W2214682759","https://openalex.org/W2536491920","https://openalex.org/W2758513252","https://openalex.org/W2789554134","https://openalex.org/W2898665561","https://openalex.org/W3026786299","https://openalex.org/W4205540825","https://openalex.org/W4236601256","https://openalex.org/W4240163901","https://openalex.org/W4245700406","https://openalex.org/W4255133361"],"related_works":["https://openalex.org/W4295916570","https://openalex.org/W4235062784","https://openalex.org/W2903040985","https://openalex.org/W3194633060","https://openalex.org/W2766700778","https://openalex.org/W2122895920","https://openalex.org/W956872486","https://openalex.org/W2148953177","https://openalex.org/W1514385342","https://openalex.org/W3002942576"],"abstract_inverted_index":{"In-Memory":[0],"Computing":[1],"(IMC)":[2],"technology":[3],"has":[4,86],"been":[5],"considered":[6],"to":[7,12,28,65,97],"be":[8],"a":[9,31],"promising":[10],"approach":[11],"solve":[13],"well-known":[14],"memory-wall":[15],"challenge":[16],"for":[17,39,120],"data":[18],"intensive":[19],"applications.":[20],"In":[21],"this":[22],"paper,":[23],"we":[24],"are":[25,62,72],"the":[26,76],"first":[27],"propose":[29],"MnM,":[30],"novel":[32,81],"IMC":[33,156],"system":[34],"with":[35],"innovative":[36],"architecture/circuit":[37],"designs":[38],"fast":[40],"and":[41,133,153],"efficient":[42],"Min/Max":[43,77,123],"searching":[44],"computation":[45],"in":[46,75,137],"emerging":[47],"Spin-Orbit":[48],"Torque":[49],"Magnetic":[50],"Random":[51],"Access":[52],"Memory":[53],"(SOT-MRAM).":[54],"Our":[55,80,126],"proposed":[56],"SOT-MRAM":[57],"based":[58,158],"in-memory":[59,82],"logic":[60,70,110],"circuits":[61,119],"specially":[63],"optimized":[64],"perform":[66],"parallel,":[67],"one-cycle":[68],"XNOR":[69,83],"that":[71,142],"heavily":[73],"used":[74],"searching-in-memory":[78],"algorithm.":[79],"circuit":[84],"also":[85,113],"an":[87],"overhead":[88],"of":[89],"just":[90],"two":[91],"transistors":[92],"per":[93],"row":[94],"when":[95],"compared":[96],"most":[98],"prior":[99],"methodologies":[100],"which":[101],"typically":[102],"use":[103],"multiple":[104],"sense":[105],"amplifiers":[106],"or":[107],"complex":[108],"CMOS":[109],"gates.":[111],"We":[112],"design":[114],"all":[115],"other":[116,134,154],"required":[117],"peripheral":[118],"implementing":[121],"complete":[122],"searching-in-MRAM":[124],"computation.":[125],"cross-layer":[127],"comprehensive":[128],"experiments":[129],"on":[130,159],"Dijkstra's":[131],"algorithm":[132],"sorting":[135],"algorithms":[136],"real":[138],"word":[139],"datasets":[140],"show":[141],"our":[143],"MnM":[144],"could":[145],"achieve":[146],"significant":[147],"performance":[148],"improvement":[149],"over":[150],"CPUs,":[151],"GPUs,":[152],"competing":[155],"platforms":[157],"RRAM/MRAM/DRAM.":[160]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
