{"id":"https://openalex.org/W4221081428","doi":"https://doi.org/10.1145/3497776.3517767","title":"Loner: utilizing the CPU vector datapath to process scalar integer data","display_name":"Loner: utilizing the CPU vector datapath to process scalar integer data","publication_year":2022,"publication_date":"2022-03-18","ids":{"openalex":"https://openalex.org/W4221081428","doi":"https://doi.org/10.1145/3497776.3517767"},"language":"en","primary_location":{"id":"doi:10.1145/3497776.3517767","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3497776.3517767","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086197407","display_name":"Armand Behroozi","orcid":"https://orcid.org/0009-0008-0318-3371"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Armand Behroozi","raw_affiliation_strings":["University of Michigan, USA"],"affiliations":[{"raw_affiliation_string":"University of Michigan, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102806371","display_name":"Sunghyun Park","orcid":"https://orcid.org/0009-0006-1056-2826"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sunghyun Park","raw_affiliation_strings":["University of Michigan, USA"],"affiliations":[{"raw_affiliation_string":"University of Michigan, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002075773","display_name":"Scott Mahlke","orcid":"https://orcid.org/0000-0002-0438-0616"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan\u2013Ann Arbor","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]},{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Scott Mahlke","raw_affiliation_strings":["University of Michigan, USA / NVIDIA Research, USA"],"affiliations":[{"raw_affiliation_string":"University of Michigan, USA / NVIDIA Research, USA","institution_ids":["https://openalex.org/I4210127875","https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5086197407"],"corresponding_institution_ids":["https://openalex.org/I27837315"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02848101,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"205","last_page":"217"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9348781108856201},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8037402629852295},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.7606803178787231},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7243669033050537},{"id":"https://openalex.org/keywords/vectorization","display_name":"Vectorization (mathematics)","score":0.6658074855804443},{"id":"https://openalex.org/keywords/scalar","display_name":"Scalar (mathematics)","score":0.6160057187080383},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.47866472601890564},{"id":"https://openalex.org/keywords/vector-processor","display_name":"Vector processor","score":0.4699150621891022},{"id":"https://openalex.org/keywords/data-parallelism","display_name":"Data parallelism","score":0.46403029561042786},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.45522865653038025},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.4519757926464081},{"id":"https://openalex.org/keywords/instruction-level-parallelism","display_name":"Instruction-level parallelism","score":0.41294994950294495},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3264293074607849},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16103217005729675},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10399246215820312}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9348781108856201},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8037402629852295},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.7606803178787231},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7243669033050537},{"id":"https://openalex.org/C41681595","wikidata":"https://www.wikidata.org/wiki/Q7917855","display_name":"Vectorization (mathematics)","level":2,"score":0.6658074855804443},{"id":"https://openalex.org/C57691317","wikidata":"https://www.wikidata.org/wiki/Q1289248","display_name":"Scalar (mathematics)","level":2,"score":0.6160057187080383},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.47866472601890564},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.4699150621891022},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.46403029561042786},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.45522865653038025},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.4519757926464081},{"id":"https://openalex.org/C140763907","wikidata":"https://www.wikidata.org/wiki/Q2714055","display_name":"Instruction-level parallelism","level":3,"score":0.41294994950294495},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3264293074607849},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16103217005729675},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10399246215820312},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3497776.3517767","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3497776.3517767","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 31st ACM SIGPLAN International Conference on Compiler Construction","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G2974791382","display_name":null,"funder_award_id":"DGE 1841052","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W106298309","https://openalex.org/W1967041093","https://openalex.org/W1981100507","https://openalex.org/W2017069727","https://openalex.org/W2018641575","https://openalex.org/W2023200270","https://openalex.org/W2044636417","https://openalex.org/W2111394443","https://openalex.org/W2112482891","https://openalex.org/W2118866757","https://openalex.org/W2135736783","https://openalex.org/W2136952590","https://openalex.org/W2140080674","https://openalex.org/W2146432333","https://openalex.org/W2292182532","https://openalex.org/W2333659671","https://openalex.org/W2488840986","https://openalex.org/W2782281640","https://openalex.org/W2796645376","https://openalex.org/W2896938601","https://openalex.org/W2902566644","https://openalex.org/W2951202371","https://openalex.org/W2962770763","https://openalex.org/W3097334869","https://openalex.org/W3152824079","https://openalex.org/W4243202427","https://openalex.org/W4246166885","https://openalex.org/W4249544322"],"related_works":["https://openalex.org/W4214860336","https://openalex.org/W2021345648","https://openalex.org/W3007272028","https://openalex.org/W2049794528","https://openalex.org/W2526302199","https://openalex.org/W2003935582","https://openalex.org/W4240606930","https://openalex.org/W2137204728","https://openalex.org/W2105992728","https://openalex.org/W1595834484"],"abstract_inverted_index":{"Modern":[0],"CPUs":[1],"utilize":[2],"SIMD":[3],"vector":[4,51],"instructions":[5],"and":[6,28,43,53],"hardware":[7],"extensions":[8],"to":[9],"accelerate":[10],"code":[11,34],"with":[12],"data-level":[13,37],"parallelism.":[14],"This":[15],"allows":[16],"for":[17],"high":[18],"performance":[19],"gains":[20],"in":[21],"select":[22],"application":[23],"domains":[24],"such":[25],"as":[26],"image":[27],"signal":[29],"processing.":[30],"However,":[31],"general":[32],"purpose":[33],"often":[35],"lacks":[36],"parallelism":[38],"or":[39],"has":[40],"complex":[41],"control":[42],"data":[44],"dependencies,":[45],"which":[46],"prevents":[47],"vectorization.":[48],"Thus,":[49],"CPU":[50],"registers":[52],"functional":[54],"units":[55],"frequently":[56],"sit":[57],"idle":[58],"while":[59],"the":[60],"scalar":[61],"datapath":[62],"unilaterally":[63],"executes":[64],"code.":[65]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}