{"id":"https://openalex.org/W3176610824","doi":"https://doi.org/10.1145/3453688.3461508","title":"Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking","display_name":"Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking","publication_year":2021,"publication_date":"2021-06-18","ids":{"openalex":"https://openalex.org/W3176610824","doi":"https://doi.org/10.1145/3453688.3461508","mag":"3176610824"},"language":"en","primary_location":{"id":"doi:10.1145/3453688.3461508","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3453688.3461508","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2021 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100328676","display_name":"Zhiming Zhang","orcid":"https://orcid.org/0009-0005-0164-3723"},"institutions":[{"id":"https://openalex.org/I161057412","display_name":"University of New Hampshire","ror":"https://ror.org/01rmh9n78","country_code":"US","type":"education","lineage":["https://openalex.org/I161057412"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhiming Zhang","raw_affiliation_strings":["University of New Hampshire, Durham, NH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New Hampshire, Durham, NH, USA","institution_ids":["https://openalex.org/I161057412"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039709669","display_name":"Ivan Miketic","orcid":"https://orcid.org/0000-0003-4935-2640"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ivan Miketic","raw_affiliation_strings":["Stony Brook University, Stony Brook, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061262597","display_name":"Emre Salman","orcid":"https://orcid.org/0000-0001-6538-6803"},"institutions":[{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emre Salman","raw_affiliation_strings":["Stony Brook University, Stony Brook, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Stony Brook University, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043556165","display_name":"Qiaoyan Yu","orcid":"https://orcid.org/0000-0002-7232-8529"},"institutions":[{"id":"https://openalex.org/I161057412","display_name":"University of New Hampshire","ror":"https://ror.org/01rmh9n78","country_code":"US","type":"education","lineage":["https://openalex.org/I161057412"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Qiaoyan Yu","raw_affiliation_strings":["University of New Hampshire, Durham, NH, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New Hampshire, Durham, NH, USA","institution_ids":["https://openalex.org/I161057412"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"415","last_page":"420"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9905999898910522,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9853000044822693,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.6541296243667603},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.640719473361969},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.5823996663093567},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5613874197006226},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5418537259101868},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5087178349494934},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.4941437542438507},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4656423330307007},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4348128139972687},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.42816194891929626},{"id":"https://openalex.org/keywords/resilience","display_name":"Resilience (materials science)","score":0.4260435998439789},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41411909461021423},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3530079424381256},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.34760135412216187},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.3309991657733917},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28419873118400574},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.23062607645988464},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22128990292549133},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1811460554599762},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.1608925461769104},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13030138611793518},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.12059152126312256},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.084937185049057}],"concepts":[{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.6541296243667603},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.640719473361969},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.5823996663093567},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5613874197006226},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5418537259101868},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5087178349494934},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.4941437542438507},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4656423330307007},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4348128139972687},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42816194891929626},{"id":"https://openalex.org/C2779585090","wikidata":"https://www.wikidata.org/wiki/Q3457762","display_name":"Resilience (materials science)","level":2,"score":0.4260435998439789},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41411909461021423},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3530079424381256},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.34760135412216187},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.3309991657733917},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28419873118400574},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.23062607645988464},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22128990292549133},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1811460554599762},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.1608925461769104},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13030138611793518},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.12059152126312256},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.084937185049057},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3453688.3461508","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3453688.3461508","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2021 Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G5030069652","display_name":"CAREER: Proactive Defense Methods for Chip Integrity and Security","funder_award_id":"1652474","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2008819052","https://openalex.org/W2012725064","https://openalex.org/W2133038247","https://openalex.org/W2154909745","https://openalex.org/W2343475170","https://openalex.org/W2883405144","https://openalex.org/W2913893101","https://openalex.org/W2970154939"],"related_works":["https://openalex.org/W659242671","https://openalex.org/W2386022279","https://openalex.org/W2098419840","https://openalex.org/W2991771859","https://openalex.org/W2152533674","https://openalex.org/W1551512938","https://openalex.org/W6024065","https://openalex.org/W1980349267","https://openalex.org/W2166506797","https://openalex.org/W24944685"],"abstract_inverted_index":{"Logic":[0],"locking":[1,20,36,95,115],"has":[2],"demonstrated":[3],"its":[4],"potential":[5],"to":[6,104,138],"protect":[7],"the":[8,53,60,86,106,111,114,118,129,134,150,163],"intellectual":[9],"property":[10],"of":[11,18,79,90,121],"integrated":[12],"circuits":[13,61],"(ICs).":[14],"The":[15,124,145],"security":[16],"strength":[17],"logic":[19,35,65,94,143],"is":[21,31],"typically":[22],"evaluated":[23],"through":[24],"functional":[25],"and":[26,109,117,157],"structural":[27],"analysis-based":[28],"attacks.":[29,42],"There":[30],"limited":[32],"work":[33],"analyzing":[34],"techniques'":[37],"resilience":[38,89],"against":[39],"power-based":[40],"side-channel":[41],"To":[43,84],"fill":[44],"this":[45],"gap,":[46],"we":[47,97],"propose":[48,98],"an":[49,91],"attack":[50,58,88],"flow":[51],"for":[52],"correlation":[54,112],"power":[55,119,160],"analysis":[56],"(CPA)":[57],"on":[59],"encrypted":[62],"with":[63],"transistor-level":[64,93],"locking.":[66],"Our":[67],"case":[68],"studies":[69],"indicate":[70],"that":[71,128,149],"CPA":[72,87],"attacks":[73,76],"outperform":[74],"DPA":[75],"in":[77],"terms":[78],"key":[80,107,116],"recovery":[81],"rate":[82],"(KRR).":[83],"improve":[85],"existing":[92],"technique,":[96],"a":[99],"logic-cone":[100],"conjunction":[101],"(LCC)":[102],"method":[103,131,152],"enlarge":[105],"space":[108],"reduce":[110],"between":[113],"consumption":[120,161],"locked":[122],"circuits.":[123],"experimental":[125],"results":[126],"show":[127],"LCC":[130],"successfully":[132],"reduces":[133],"KRR":[135],"from":[136],"100%":[137],"0%":[139],"by":[140],"using":[141],"cyclic":[142],"structures.":[144],"FPGA":[146],"emulation":[147],"indicates":[148],"proposed":[151],"incurs":[153],"2.6%":[154],"more":[155,159],"delay":[156],"1.5%":[158],"than":[162],"baseline.":[164]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}