{"id":"https://openalex.org/W3129588165","doi":"https://doi.org/10.1145/3431920.3439287","title":"An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components","display_name":"An FPGA-based 7-ENOB 600 MSample/s ADC without any External Components","publication_year":2021,"publication_date":"2021-02-17","ids":{"openalex":"https://openalex.org/W3129588165","doi":"https://doi.org/10.1145/3431920.3439287","mag":"3129588165"},"language":"en","primary_location":{"id":"doi:10.1145/3431920.3439287","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3431920.3439287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://digitalcommons.uri.edu/ele_facpubs/1213","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043540991","display_name":"Lukas Leuenberger","orcid":"https://orcid.org/0000-0001-5961-2261"},"institutions":[{"id":"https://openalex.org/I4210127453","display_name":"University of Applied Sciences Rapperswil","ror":"https://ror.org/02g821610","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210127453"]},{"id":"https://openalex.org/I4210129390","display_name":"OST - Ostschweizer Fachhochschule","ror":"https://ror.org/038mj2660","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210129390"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Lukas Leuenberger","raw_affiliation_strings":["OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland","institution_ids":["https://openalex.org/I4210129390","https://openalex.org/I4210127453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077025081","display_name":"Dorian Amiet","orcid":"https://orcid.org/0000-0002-8427-7511"},"institutions":[{"id":"https://openalex.org/I4210127453","display_name":"University of Applied Sciences Rapperswil","ror":"https://ror.org/02g821610","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210127453"]},{"id":"https://openalex.org/I4210129390","display_name":"OST - Ostschweizer Fachhochschule","ror":"https://ror.org/038mj2660","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210129390"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Dorian Amiet","raw_affiliation_strings":["OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland","institution_ids":["https://openalex.org/I4210129390","https://openalex.org/I4210127453"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062578450","display_name":"Tao Wei","orcid":"https://orcid.org/0000-0002-4765-1826"},"institutions":[{"id":"https://openalex.org/I17626003","display_name":"University of Rhode Island","ror":"https://ror.org/013ckk937","country_code":"US","type":"education","lineage":["https://openalex.org/I17626003"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tao Wei","raw_affiliation_strings":["University of Rhode Island, Kingston, RI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Rhode Island, Kingston, RI, USA","institution_ids":["https://openalex.org/I17626003"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022233665","display_name":"Paul Zbinden","orcid":"https://orcid.org/0000-0001-8630-3296"},"institutions":[{"id":"https://openalex.org/I4210127453","display_name":"University of Applied Sciences Rapperswil","ror":"https://ror.org/02g821610","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210127453"]},{"id":"https://openalex.org/I4210129390","display_name":"OST - Ostschweizer Fachhochschule","ror":"https://ror.org/038mj2660","country_code":"CH","type":"education","lineage":["https://openalex.org/I4210129390"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Paul Zbinden","raw_affiliation_strings":["OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"OST - Eastern Switzerland University of Applied Sciences, Rapperswil, Switzerland","institution_ids":["https://openalex.org/I4210129390","https://openalex.org/I4210127453"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.019,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.72535092,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"240","last_page":"250"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/effective-number-of-bits","display_name":"Effective number of bits","score":0.9768776893615723},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.7827051281929016},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7767400741577148},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.7426798343658447},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5823678970336914},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.5713457465171814},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5679307579994202},{"id":"https://openalex.org/keywords/analog-to-digital-converter","display_name":"Analog-to-digital converter","score":0.4894086420536041},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4357580244541168},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4222489297389984},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.36835533380508423},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.30198127031326294},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.29727011919021606},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.27464598417282104},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24931317567825317},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.1994660496711731},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09628862142562866}],"concepts":[{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.9768776893615723},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.7827051281929016},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7767400741577148},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.7426798343658447},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5823678970336914},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.5713457465171814},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5679307579994202},{"id":"https://openalex.org/C2777271169","wikidata":"https://www.wikidata.org/wiki/Q190169","display_name":"Analog-to-digital converter","level":3,"score":0.4894086420536041},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4357580244541168},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4222489297389984},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36835533380508423},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.30198127031326294},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.29727011919021606},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.27464598417282104},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24931317567825317},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1994660496711731},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09628862142562866},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3431920.3439287","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3431920.3439287","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},{"id":"pmh:oai:digitalcommons.uri.edu:ele_facpubs-2212","is_oa":true,"landing_page_url":"https://digitalcommons.uri.edu/ele_facpubs/1213","pdf_url":null,"source":{"id":"https://openalex.org/S2764761010","display_name":"Journal of Media Literacy Education","issn_l":"2167-8715","issn":["2167-8715"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310316378","host_organization_name":"National Association for Media Literacy Education","host_organization_lineage":["https://openalex.org/P4310316378"],"host_organization_lineage_names":["National Association for Media Literacy Education"],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical, Computer, and Biomedical Engineering Faculty Publications","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:digitalcommons.uri.edu:ele_facpubs-2212","is_oa":true,"landing_page_url":"https://digitalcommons.uri.edu/ele_facpubs/1213","pdf_url":null,"source":{"id":"https://openalex.org/S2764761010","display_name":"Journal of Media Literacy Education","issn_l":"2167-8715","issn":["2167-8715"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310316378","host_organization_name":"National Association for Media Literacy Education","host_organization_lineage":["https://openalex.org/P4310316378"],"host_organization_lineage_names":["National Association for Media Literacy Education"],"type":"journal"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical, Computer, and Biomedical Engineering Faculty Publications","raw_type":"text"},"sustainable_development_goals":[{"score":0.5600000023841858,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1512104042","https://openalex.org/W1964615589","https://openalex.org/W1966321787","https://openalex.org/W2042752111","https://openalex.org/W2088404942","https://openalex.org/W2092028533","https://openalex.org/W2134814047","https://openalex.org/W2141744777","https://openalex.org/W2148367377","https://openalex.org/W2156435621","https://openalex.org/W2163805454","https://openalex.org/W2182137010","https://openalex.org/W2513702809","https://openalex.org/W2533128568","https://openalex.org/W2600113043","https://openalex.org/W2903160981","https://openalex.org/W2970259285","https://openalex.org/W2992662776"],"related_works":["https://openalex.org/W2125340824","https://openalex.org/W2904640696","https://openalex.org/W2089085097","https://openalex.org/W2557005923","https://openalex.org/W2490203154","https://openalex.org/W2207354743","https://openalex.org/W4390214921","https://openalex.org/W2416586275","https://openalex.org/W3005236245","https://openalex.org/W2386561878"],"abstract_inverted_index":{"Analog":[0,8],"to":[1,19,103,123,196],"digital":[2,127,139],"converters":[3],"(ADCs)":[4],"are":[5,10,32,46,101],"indispensable":[6],"nowadays.":[7],"signals":[9],"digitized":[11],"earlier":[12,14],"and":[13,111,154,172,199,210,223],"in":[15,143,205],"the":[16,21,74,83,86,93,96,105,121,134,149,200,206,217],"processing":[17],"chain":[18],"reduce":[20],"need":[22],"for":[23,48],"complex":[24],"analog":[25],"signal":[26],"processing.":[27],"For":[28],"this":[29,58,147],"reason,":[30],"ADCs":[31,45],"often":[33],"integrated":[34],"directly":[35,158],"into":[36,130],"field-programmable":[37],"gate":[38],"arrays":[39],"(FPGA)":[40],"or":[41],"microprocessors.":[42],"However,":[43],"such":[44],"designed":[47],"a":[49,60,78,89,152,160,167,183],"specific":[50],"set":[51],"of":[52,63,88,138,151,169,177,180,186,216,227],"requirements":[53],"with":[54],"limited":[55],"flexibility.":[56],"In":[57],"paper,":[59],"new":[61],"structure":[62],"an":[64,131,174,225],"FPGA-based":[65],"ADC":[66,70,156,165,218],"is":[67,71,108,204],"proposed.":[68],"The":[69,163,189],"based":[72],"on":[73,159],"slope":[75,91,94],"ADC,":[76],"where":[77],"time-to-digital":[79],"converter":[80],"(TDC)":[81],"measures":[82],"time":[84],"from":[85,194],"beginning":[87],"reference":[90],"until":[92],"reaches":[95],"voltage-to-be-measured.":[97],"Only":[98],"FPGA-internal":[99],"elements":[100],"used":[102],"build":[104],"ADC.":[106,132],"It":[107],"fully":[109],"reconfigurable":[110],"does":[112],"not":[113],"require":[114],"any":[115,126],"external":[116],"components.":[117],"This":[118],"innovation":[119],"offers":[120],"flexibility":[122],"convert":[124],"almost":[125],"input/output":[128],"(I/O)":[129],"Considering":[133],"very":[135],"high":[136],"number":[137,176],"I/O":[140],"ports":[141],"available":[142],"today's":[144],"FPGA":[145],"systems,":[146],"enables":[148],"construction":[150],"massive":[153],"powerful":[155],"array":[157],"standard":[161],"FPGA.":[162],"proposed":[164],"has":[166],"resolution":[168],"9.3":[170],"bit":[171],"achieves":[173,224],"effective":[175],"bits":[178],"(ENOB)":[179],"7":[181],"at":[182,220],"sample":[184],"rate":[185],"600":[187],"MSample/s.":[188],"differential":[190],"nonlinearity":[191,202],"(DNL)":[192],"ranges":[193],"-0.9":[195],"0.9":[197,211],"bit,":[198],"integral":[201],"(INL)":[203],"range":[207],"between":[208],"-1.1":[209],"bit.":[212],"An":[213],"alternative":[214],"version":[215],"operates":[219],"1.2":[221],"GSample/s":[222],"ENOB":[226],"5.3.":[228]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
