{"id":"https://openalex.org/W3085072639","doi":"https://doi.org/10.1145/3408127.3408185","title":"A New Implementation of 16-bit Parallel Prefix Adder for High Speed and Low Area","display_name":"A New Implementation of 16-bit Parallel Prefix Adder for High Speed and Low Area","publication_year":2020,"publication_date":"2020-06-19","ids":{"openalex":"https://openalex.org/W3085072639","doi":"https://doi.org/10.1145/3408127.3408185","mag":"3085072639"},"language":"en","primary_location":{"id":"doi:10.1145/3408127.3408185","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3408127.3408185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 4th International Conference on Digital Signal Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107947196","display_name":"Qing Liao","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Qing Liao","raw_affiliation_strings":["Department of Microelectronics and Nanoelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics and Nanoelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069478114","display_name":"Shuguo Li","orcid":"https://orcid.org/0000-0002-1746-7112"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuguo Li","raw_affiliation_strings":["Department of Microelectronics and Nanoelectronics, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Department of Microelectronics and Nanoelectronics, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5107947196"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.2055,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.51172661,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"284","last_page":"288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.919182300567627},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.7209981083869934},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6888484954833984},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.5701039433479309},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.5197557806968689},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49757078289985657},{"id":"https://openalex.org/keywords/prefix","display_name":"Prefix","score":0.4966023564338684},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4673483967781067},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22348758578300476},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09905502200126648}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.919182300567627},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.7209981083869934},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6888484954833984},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5701039433479309},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.5197557806968689},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49757078289985657},{"id":"https://openalex.org/C141603448","wikidata":"https://www.wikidata.org/wiki/Q134830","display_name":"Prefix","level":2,"score":0.4966023564338684},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4673483967781067},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22348758578300476},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09905502200126648},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3408127.3408185","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3408127.3408185","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 4th International Conference on Digital Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.6399999856948853}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1963965124","https://openalex.org/W1994560221","https://openalex.org/W1997582549","https://openalex.org/W2024263487","https://openalex.org/W2043169655","https://openalex.org/W2061485512","https://openalex.org/W2103316343","https://openalex.org/W2115256077","https://openalex.org/W2141984024","https://openalex.org/W2143462372","https://openalex.org/W2168543008","https://openalex.org/W6903636598"],"related_works":["https://openalex.org/W2364181090","https://openalex.org/W4299002946","https://openalex.org/W2950518102","https://openalex.org/W2516396101","https://openalex.org/W2953746839","https://openalex.org/W2370097872","https://openalex.org/W2112595260","https://openalex.org/W4295540194","https://openalex.org/W1993041309","https://openalex.org/W2064215635"],"abstract_inverted_index":{"Adders":[0],"are":[1,85,101],"the":[2,29,35,41,73,76,92,96],"most":[3],"common":[4],"and":[5,34,59,81,98,129,147],"basic":[6],"building":[7],"blocks":[8],"in":[9,132,145,151],"arithmetic":[10],"logic":[11,32,89],"units":[12],"of":[13,22,31,37,75,95],"public-key":[14],"encryption":[15],"systems":[16],"such":[17,126],"as":[18,127],"RSA.":[19],"The":[20,137],"performance":[21],"a":[23,47],"parallel":[24,49],"prefix":[25,38,42,50,54,77,83],"adder":[26,51,113,140],"depends":[27],"on":[28,91],"depth":[30,90],"gates":[33],"numbers":[36],"nodes":[39,84,100],"for":[40,56],"network.":[43,78],"In":[44],"this":[45,111],"paper,":[46],"16-bit":[48,138],"with":[52],"new":[53,112,139],"network":[55],"high":[57],"speed":[58],"low":[60],"area":[61,152],"is":[62,69,114,141],"proposed.":[63],"A":[64],"more":[65],"compact":[66],"data":[67],"structure":[68],"applied":[70],"to":[71,87,103],"reduce":[72,88],"size":[74],"Hybrid":[79],"radix-2":[80],"radix-3":[82],"used":[86,102],"critical":[93],"path":[94],"adder,":[97,123],"cloning":[99],"avoid":[104],"large":[105],"fan-out.":[106],"Synthesis":[107],"results":[108],"demonstrate":[109],"that":[110],"better":[115],"than":[116,153],"industry":[117],"standard":[118],"Synopsys":[119,154],"Design":[120],"Compiler":[121],"(DC)":[122],"regular":[124],"adders":[125,131],"Kogge--Stone":[128],"Brent-Kung":[130],"TSMC":[133],"28":[134],"nm":[135],"technology.":[136],"1.14":[142],"ps":[143],"faster":[144],"delay":[146],"12.216":[148],"um2":[149],"smaller":[150],"DC":[155],"adder.":[156]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}