{"id":"https://openalex.org/W3080250604","doi":"https://doi.org/10.1145/3406114","title":"Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System","display_name":"Cooperative Software-hardware Acceleration of K-means on a Tightly Coupled CPU-FPGA System","publication_year":2020,"publication_date":"2020-08-17","ids":{"openalex":"https://openalex.org/W3080250604","doi":"https://doi.org/10.1145/3406114","mag":"3080250604"},"language":"en","primary_location":{"id":"doi:10.1145/3406114","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3406114","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3406114","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"diamond","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3406114","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080157948","display_name":"Tarek S. Abdelrahman","orcid":"https://orcid.org/0000-0002-2985-4873"},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Tarek S. Abdelrahman","raw_affiliation_strings":["The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, Canada"],"affiliations":[{"raw_affiliation_string":"The Edward S. Rogers Sr. Department of Electrical and Computer Engineering, University of Toronto, Toronto, Ontario, Canada","institution_ids":["https://openalex.org/I185261750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5080157948"],"corresponding_institution_ids":["https://openalex.org/I185261750"],"apc_list":null,"apc_paid":null,"fwci":0.7954,"has_fulltext":true,"cited_by_count":10,"citation_normalized_percentile":{"value":0.78418415,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"17","issue":"3","first_page":"1","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12761","display_name":"Data Stream Mining Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12761","display_name":"Data Stream Mining Techniques","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10637","display_name":"Advanced Clustering Algorithms Research","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10742","display_name":"Peer-to-Peer Network Technologies","score":0.9865999817848206,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7901227474212646},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.771201491355896},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.7445639967918396},{"id":"https://openalex.org/keywords/cpu-shielding","display_name":"CPU shielding","score":0.6542035937309265},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6516902446746826},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6451762318611145},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.6399804353713989},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.6197985410690308},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5760464072227478},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5216786861419678},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47984859347343445},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4444093704223633},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4091516435146332},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3023361563682556}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7901227474212646},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.771201491355896},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.7445639967918396},{"id":"https://openalex.org/C180613757","wikidata":"https://www.wikidata.org/wiki/Q5013757","display_name":"CPU shielding","level":3,"score":0.6542035937309265},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6516902446746826},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6451762318611145},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.6399804353713989},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.6197985410690308},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5760464072227478},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5216786861419678},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47984859347343445},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4444093704223633},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4091516435146332},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3023361563682556},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3406114","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3406114","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3406114","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1145/3406114","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3406114","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3406114","source":{"id":"https://openalex.org/S26056741","display_name":"ACM Transactions on Architecture and Code Optimization","issn_l":"1544-3566","issn":["1544-3566","1544-3973"],"is_oa":true,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Architecture and Code Optimization","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3080250604.pdf","grobid_xml":"https://content.openalex.org/works/W3080250604.grobid-xml"},"referenced_works_count":18,"referenced_works":["https://openalex.org/W281139126","https://openalex.org/W1559440783","https://openalex.org/W1993338334","https://openalex.org/W2001159324","https://openalex.org/W2001518303","https://openalex.org/W2008241424","https://openalex.org/W2150593711","https://openalex.org/W2497532187","https://openalex.org/W2558424778","https://openalex.org/W2594609971","https://openalex.org/W2802863387","https://openalex.org/W2883796260","https://openalex.org/W2896567510","https://openalex.org/W2915289217","https://openalex.org/W2917675277","https://openalex.org/W2950549070","https://openalex.org/W4243277949","https://openalex.org/W4300378195"],"related_works":["https://openalex.org/W2170268965","https://openalex.org/W2580284127","https://openalex.org/W1847937745","https://openalex.org/W2351404747","https://openalex.org/W2750757353","https://openalex.org/W55440466","https://openalex.org/W3080250604","https://openalex.org/W2974672311","https://openalex.org/W2541819923","https://openalex.org/W2370179082"],"abstract_inverted_index":{"We":[0,12],"consider":[1],"software-hardware":[2],"acceleration":[3,31],"of":[4,29,65,70],"K-means":[5,18],"clustering":[6],"on":[7],"the":[8,49,62,83],"Intel":[9],"Xeon+FPGA":[10],"platform.":[11],"design":[13],"a":[14,57],"pipelined":[15],"accelerator":[16,50],"for":[17,61],"and":[19,40,72],"combine":[20],"it":[21],"with":[22],"CPU":[23,59,79],"threads":[24,71,80],"to":[25,53,94],"assess":[26],"performance":[27],"benefits":[28],"(1)":[30],"when":[32],"data":[33],"are":[34],"only":[35],"accessed":[36],"from":[37],"system":[38],"memory":[39],"(2)":[41],"cooperative":[42,68],"CPU-FPGA":[43],"acceleration.":[44],"Our":[45,87],"evaluation":[46],"shows":[47],"that":[48],"is":[51,74],"up":[52],"12.7\u00d7/2.4\u00d7":[54],"faster":[55,77],"than":[56,78],"single":[58],"thread":[60],"assignment/update":[63],"step":[64],"K-means.":[66],"The":[67],"use":[69],"FPGA":[73,84],"roughly":[75],"1.9\u00d7":[76],"alone":[81],"or":[82],"by":[85],"itself.":[86],"approach":[88],"delivers":[89],"4\u00d7\u20135\u00d7":[90],"higher":[91],"throughput":[92],"compared":[93],"existing":[95],"offload":[96],"processing":[97],"approaches.":[98]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
