{"id":"https://openalex.org/W3114046495","doi":"https://doi.org/10.1145/3400302.3415740","title":"Problem C","display_name":"Problem C","publication_year":2020,"publication_date":"2020-11-02","ids":{"openalex":"https://openalex.org/W3114046495","doi":"https://doi.org/10.1145/3400302.3415740","mag":"3114046495"},"language":"en","primary_location":{"id":"doi:10.1145/3400302.3415740","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3400302.3415740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 39th International Conference on Computer-Aided Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100612105","display_name":"Yanqing Zhang","orcid":"https://orcid.org/0000-0003-2349-1925"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yanqing Zhang","raw_affiliation_strings":["NVIDIA Corporation"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029928585","display_name":"Haoxing Ren","orcid":"https://orcid.org/0000-0003-1028-3860"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Haoxing Ren","raw_affiliation_strings":["NVIDIA Corporation"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001800455","display_name":"Ben Keller","orcid":"https://orcid.org/0000-0002-8117-1412"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ben Keller","raw_affiliation_strings":["NVIDIA Corporation"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010156116","display_name":"Brucek Khailany","orcid":"https://orcid.org/0000-0002-7584-3489"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brucek Khailany","raw_affiliation_strings":["NVIDIA Corporation"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100612105"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":0.7036,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.77221936,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7788528800010681},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.7045541405677795},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.6911951303482056},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5908423662185669},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5426687598228455},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.5156418085098267},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5057110786437988},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4808705449104309},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.4759649634361267},{"id":"https://openalex.org/keywords/waveform","display_name":"Waveform","score":0.45183122158050537},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.43647637963294983},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33642858266830444},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.14715197682380676},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12230876088142395},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1044650673866272}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7788528800010681},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.7045541405677795},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.6911951303482056},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5908423662185669},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5426687598228455},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.5156418085098267},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5057110786437988},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4808705449104309},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.4759649634361267},{"id":"https://openalex.org/C197424946","wikidata":"https://www.wikidata.org/wiki/Q1165717","display_name":"Waveform","level":3,"score":0.45183122158050537},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.43647637963294983},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33642858266830444},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.14715197682380676},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12230876088142395},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1044650673866272},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C554190296","wikidata":"https://www.wikidata.org/wiki/Q47528","display_name":"Radar","level":2,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3400302.3415740","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3400302.3415740","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 39th International Conference on Computer-Aided Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2169553754","https://openalex.org/W2277653173","https://openalex.org/W2945592068","https://openalex.org/W4234212765","https://openalex.org/W4238785513"],"related_works":["https://openalex.org/W2132684947","https://openalex.org/W1412895167","https://openalex.org/W2165817266","https://openalex.org/W1493811107","https://openalex.org/W2120257283","https://openalex.org/W2117563988","https://openalex.org/W2161696808","https://openalex.org/W4240466429","https://openalex.org/W2085176210","https://openalex.org/W3114476551"],"abstract_inverted_index":{"Logic":[0],"\"re\"-simulation":[1],"can":[2,62],"be":[3],"defined":[4],"as":[5,21],"gate":[6,54,102],"level":[7,55,103],"simulation":[8,34,46,99,104],"where":[9],"the":[10,31,64,74,90,96,133],"input":[11,16,19],"waveforms":[12,27],"at":[13,89],"every":[14],"primary":[15,69,91],"and":[17,57,70,85,92],"pseudo-primary":[18,71,93],"(such":[20],"register/RAM":[22],"outputs)":[23],"are":[24],"known.":[25],"Such":[26],"could":[28],"come":[29],"from":[30],"unit's":[32],"RTL":[33,98,110],"trace":[35,66,75],"or":[36],"Automatic":[37],"Test":[38],"Pattern":[39],"Generation":[40],"(ATPG)":[41],"vectors.":[42],"This":[43],"type":[44],"of":[45,78],"is":[47,105,114],"useful":[48],"in":[49],"doing":[50],"functional":[51],"verification":[52],"on":[53,67],"netlists":[56],"power":[58],"analysis,":[59],"since":[60],"we":[61,122],"take":[63],"known":[65],"all":[68],"inputs,":[72],"re-simulate":[73],"using":[76],"propagation":[77],"signals":[79],"through":[80],"timing-aware":[81],"gate-level":[82],"combinational":[83],"logic,":[84],"verify":[86],"that":[87],"results":[88],"outputs":[94],"match":[95],"reference":[97],"results.":[100],"However,":[101],"usually":[106],"much":[107],"slower":[108],"than":[109],"simulation.":[111],"Thus,":[112],"there":[113],"motivation":[115],"for":[116],"faster":[117],"solutions.":[118],"In":[119],"this":[120],"contest,":[121],"ask":[123],"contestants":[124],"to":[125,131],"use":[126],"Graphic":[127],"Processing":[128],"Units":[129],"(GPUs)":[130],"speedup":[132],"re-simulation":[134],"task.":[135]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2021-01-05T00:00:00"}