{"id":"https://openalex.org/W3128864682","doi":"https://doi.org/10.1145/3394885.3431412","title":"Prediction of Register Instance Usage and Time-sharing Register for Extended Register Reuse Scheme","display_name":"Prediction of Register Instance Usage and Time-sharing Register for Extended Register Reuse Scheme","publication_year":2021,"publication_date":"2021-01-18","ids":{"openalex":"https://openalex.org/W3128864682","doi":"https://doi.org/10.1145/3394885.3431412","mag":"3128864682"},"language":"en","primary_location":{"id":"doi:10.1145/3394885.3431412","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3394885.3431412","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3394885.3431412","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://dl.acm.org/doi/pdf/10.1145/3394885.3431412","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110686678","display_name":"Shuxin Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I4210090176","display_name":"Institute of Computing Technology","ror":"https://ror.org/0090r4d87","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210090176"]},{"id":"https://openalex.org/I4210165038","display_name":"University of Chinese Academy of Sciences","ror":"https://ror.org/05qbk4x57","country_code":"CN","type":"education","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210165038"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shuxin Zhou","raw_affiliation_strings":["State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China and University of Chinese Academy of Sciences, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China and University of Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210090176","https://openalex.org/I4210165038"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034129532","display_name":"Huandong Wang","orcid":"https://orcid.org/0000-0002-6382-0861"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Huandong Wang","raw_affiliation_strings":["Loongson Corporation, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Loongson Corporation, Beijing, China","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101758077","display_name":"Dong Tong","orcid":"https://orcid.org/0000-0003-0987-6351"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dong Tong","raw_affiliation_strings":["Peking University, Beijing, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"3","issue":null,"first_page":"216","last_page":"221"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.789025604724884},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.7690512537956238},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.7491438388824463},{"id":"https://openalex.org/keywords/register","display_name":"Register (sociolinguistics)","score":0.7381967902183533},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6849567294120789},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.6194714903831482},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.5612357258796692},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5103203654289246},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.4341726303100586},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3596261441707611},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19438481330871582},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14822784066200256},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.14261791110038757},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09124815464019775},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06794393062591553}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.789025604724884},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.7690512537956238},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.7491438388824463},{"id":"https://openalex.org/C2779235478","wikidata":"https://www.wikidata.org/wiki/Q286576","display_name":"Register (sociolinguistics)","level":2,"score":0.7381967902183533},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6849567294120789},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.6194714903831482},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.5612357258796692},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5103203654289246},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.4341726303100586},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3596261441707611},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19438481330871582},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14822784066200256},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.14261791110038757},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09124815464019775},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06794393062591553},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C548081761","wikidata":"https://www.wikidata.org/wiki/Q180388","display_name":"Waste management","level":1,"score":0.0},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3394885.3431412","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3394885.3431412","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3394885.3431412","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"}],"best_oa_location":{"id":"doi:10.1145/3394885.3431412","is_oa":true,"landing_page_url":"https://doi.org/10.1145/3394885.3431412","pdf_url":"https://dl.acm.org/doi/pdf/10.1145/3394885.3431412","source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 26th Asia and South Pacific Design Automation Conference","raw_type":"proceedings-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3128864682.pdf","grobid_xml":"https://content.openalex.org/works/W3128864682.grobid-xml"},"referenced_works_count":30,"referenced_works":["https://openalex.org/W1549770887","https://openalex.org/W1868432933","https://openalex.org/W1949410241","https://openalex.org/W1964740750","https://openalex.org/W2105808473","https://openalex.org/W2112872641","https://openalex.org/W2117877698","https://openalex.org/W2135270610","https://openalex.org/W2138777150","https://openalex.org/W2140348738","https://openalex.org/W2143104153","https://openalex.org/W2143188883","https://openalex.org/W2145462867","https://openalex.org/W2147098645","https://openalex.org/W2159254447","https://openalex.org/W2164474450","https://openalex.org/W2325153866","https://openalex.org/W2613391629","https://openalex.org/W2765144052","https://openalex.org/W2795131575","https://openalex.org/W2892817096","https://openalex.org/W2933147490","https://openalex.org/W2999509507","https://openalex.org/W4230316055","https://openalex.org/W4236345830","https://openalex.org/W4244075691","https://openalex.org/W4244922846","https://openalex.org/W4245342790","https://openalex.org/W4248734552","https://openalex.org/W4299029681"],"related_works":["https://openalex.org/W2159458033","https://openalex.org/W2224192221","https://openalex.org/W1967889241","https://openalex.org/W2111377238","https://openalex.org/W2161297616","https://openalex.org/W3117494601","https://openalex.org/W4247209662","https://openalex.org/W2195435904","https://openalex.org/W2148662141","https://openalex.org/W2159389028"],"abstract_inverted_index":{"Register":[0],"renaming":[1,40],"is":[2,30,65,136],"the":[3,6,12,16,31,44,56,69,73,97,101,108,112,115,120,144,150,165],"key":[4],"for":[5],"performance":[7,159],"of":[8,15,46,58,72,96,100,114,122,128,164,167],"out-of-order":[9],"processors.":[10],"However,":[11,55],"release":[13,35],"mechanism":[14],"physical":[17,37,70,109,145,168],"register":[18,27,38,48,74,88,102,130,146,152],"may":[19],"cause":[20],"a":[21,36],"waste":[22],"from":[23],"time":[24,53],"dimension.":[25],"The":[26],"reuse":[28,60,89,107,153],"technique":[29],"earliest":[32],"solution":[33],"to":[34,76,106,118,142],"at":[39,80,111],"stage,":[41],"which":[42,135],"takes":[43],"advantage":[45],"those":[47],"instances":[49],"with":[50,132,149,170],"only":[51],"one":[52],"use.":[54],"range":[57,121],"possible":[59,123],"mined":[61],"by":[62,138],"this":[63,155],"scheme":[64],"not":[66],"high,":[67],"and":[68],"structure":[71],"have":[75],"be":[77],"modified.":[78],"Aiming":[79],"these":[81],"two":[82],"problems,":[83],"we":[84],"propose":[85],"an":[86],"extended":[87],"scheme.":[90],"Our":[91],"work":[92,156],"presents:":[93],"1)":[94],"prediction":[95],"use":[98],"times":[99],"instance,":[103],"so":[104],"as":[105],"registers":[110,169],"end":[113],"last":[116],"use,":[117],"expand":[119],"reuse.":[124],"2)":[125],"A":[126],"design":[127],"time-sharing":[129],"file":[131],"little":[133],"overheads":[134],"implemented":[137],"Backup":[139],"Registers,":[140],"avoiding":[141],"modify":[143],"structure.":[147],"Compared":[148],"original":[151],"technique,":[154],"achieves":[157],"8.5%":[158],"improvement,":[160],"alternatively,":[161],"9.6%":[162],"decrease":[163],"number":[166],"minor":[171],"hardware":[172],"overhead.":[173]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
