{"id":"https://openalex.org/W3031042024","doi":"https://doi.org/10.1145/3386415.3387009","title":"A High Speed Clock Receiver for DAC with Cross point and Duty Cycle Adjustable Capability","display_name":"A High Speed Clock Receiver for DAC with Cross point and Duty Cycle Adjustable Capability","publication_year":2019,"publication_date":"2019-12-06","ids":{"openalex":"https://openalex.org/W3031042024","doi":"https://doi.org/10.1145/3386415.3387009","mag":"3031042024"},"language":"en","primary_location":{"id":"doi:10.1145/3386415.3387009","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3386415.3387009","pdf_url":null,"source":{"id":"https://openalex.org/S4306523750","display_name":"Proceedings of the 2nd International Conference on Information Technologies and Electrical Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Conference on Information Technologies and Electrical Engineering","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039173319","display_name":"Jun Liu","orcid":"https://orcid.org/0000-0002-0867-8153"},"institutions":[{"id":"https://openalex.org/I160014373","display_name":"Analogic (United States)","ror":"https://ror.org/03ge13j80","country_code":"US","type":"company","lineage":["https://openalex.org/I160014373"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jun Liu","raw_affiliation_strings":["National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA","institution_ids":["https://openalex.org/I160014373"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058398139","display_name":"Xianjie Wan","orcid":null},"institutions":[{"id":"https://openalex.org/I160014373","display_name":"Analogic (United States)","ror":"https://ror.org/03ge13j80","country_code":"US","type":"company","lineage":["https://openalex.org/I160014373"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xianjie Wan","raw_affiliation_strings":["National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA","institution_ids":["https://openalex.org/I160014373"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100818333","display_name":"Mingyuan Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I160014373","display_name":"Analogic (United States)","ror":"https://ror.org/03ge13j80","country_code":"US","type":"company","lineage":["https://openalex.org/I160014373"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mingyuan Xu","raw_affiliation_strings":["National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA","institution_ids":["https://openalex.org/I160014373"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101482118","display_name":"Youhua Wang","orcid":"https://orcid.org/0000-0002-4580-8172"},"institutions":[{"id":"https://openalex.org/I160014373","display_name":"Analogic (United States)","ror":"https://ror.org/03ge13j80","country_code":"US","type":"company","lineage":["https://openalex.org/I160014373"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Youhua Wang","raw_affiliation_strings":["National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA","institution_ids":["https://openalex.org/I160014373"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017799614","display_name":"Yi Ding","orcid":"https://orcid.org/0000-0001-8901-5812"},"institutions":[{"id":"https://openalex.org/I160014373","display_name":"Analogic (United States)","ror":"https://ror.org/03ge13j80","country_code":"US","type":"company","lineage":["https://openalex.org/I160014373"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yi Ding","raw_affiliation_strings":["National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"National Key Laboratory of Analog, Integrated Circuits, Chongqing, CHINA","institution_ids":["https://openalex.org/I160014373"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033647528","display_name":"Dongbing Fu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210149211","display_name":"Institute of Semiconductors","ror":"https://ror.org/048dd0611","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210149211"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dongbing Fu","raw_affiliation_strings":["Sichuan Institute of Solid-State Circuits Chongqing, CHINA"],"affiliations":[{"raw_affiliation_string":"Sichuan Institute of Solid-State Circuits Chongqing, CHINA","institution_ids":["https://openalex.org/I4210149211"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5039173319"],"corresponding_institution_ids":["https://openalex.org/I160014373"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.35252725,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/duty-cycle","display_name":"Duty cycle","score":0.8905370235443115},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5562101006507874},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5318973064422607},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5033788084983826},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.48613211512565613},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4371246099472046},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4210549592971802},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3856360614299774},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3613269329071045},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27345919609069824},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2432641088962555},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1304859220981598}],"concepts":[{"id":"https://openalex.org/C199822604","wikidata":"https://www.wikidata.org/wiki/Q557120","display_name":"Duty cycle","level":3,"score":0.8905370235443115},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5562101006507874},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5318973064422607},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5033788084983826},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.48613211512565613},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4371246099472046},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4210549592971802},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3856360614299774},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3613269329071045},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27345919609069824},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2432641088962555},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1304859220981598},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3386415.3387009","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3386415.3387009","pdf_url":null,"source":{"id":"https://openalex.org/S4306523750","display_name":"Proceedings of the 2nd International Conference on Information Technologies and Electrical Engineering","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2nd International Conference on Information Technologies and Electrical Engineering","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7400000095367432,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1993828767","https://openalex.org/W2012895273","https://openalex.org/W2158374654","https://openalex.org/W2503727192","https://openalex.org/W4247080677","https://openalex.org/W6653510894","https://openalex.org/W6724651946"],"related_works":["https://openalex.org/W2944237261","https://openalex.org/W2511469609","https://openalex.org/W3010677359","https://openalex.org/W3197792191","https://openalex.org/W2371125232","https://openalex.org/W2498933190","https://openalex.org/W2383650581","https://openalex.org/W2023505575","https://openalex.org/W2242290487","https://openalex.org/W3107484287"],"abstract_inverted_index":{"This":[0],"paper":[1,22],"introduces":[2],"a":[3],"kind":[4],"of":[5,68],"high":[6],"speed":[7],"clock":[8,71],"receiver":[9],"for":[10],"DAC":[11],"with":[12,43],"cross":[13,26,51,66],"point":[14,27,52,67],"and":[15,28,53,77],"duty":[16,29,54,79],"cycle":[17,30,55,80],"adjustable":[18,31],"capability.":[19],"In":[20,61],"this":[21],"the":[23,35,40,49,57,62,65,69,74,78,88,91],"circuit":[24],"realizes":[25],"function":[32],"by":[33],"changing":[34],"node":[36],"common-mode":[37],"voltage":[38],"in":[39],"signal":[41,72],"path":[42],"different":[44],"ways.":[45],"It":[46],"can":[47],"obtain":[48],"satisfying":[50],"through":[56],"negative":[58],"feedback":[59],"loop.":[60],"post":[63],"simulation":[64],"output":[70],"meets":[73],"design":[75],"requirements,":[76],"is":[81,94],"adjusted":[82],"from":[83,90],"45%":[84],"to":[85],"50.09%.":[86],"So":[87],"error":[89],"target":[92],"value":[93],"less":[95],"than":[96],"0.1%.":[97]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}