{"id":"https://openalex.org/W3083545463","doi":"https://doi.org/10.1145/3386263.3406907","title":"SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy","display_name":"SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy","publication_year":2020,"publication_date":"2020-09-04","ids":{"openalex":"https://openalex.org/W3083545463","doi":"https://doi.org/10.1145/3386263.3406907","mag":"3083545463"},"language":"en","primary_location":{"id":"doi:10.1145/3386263.3406907","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3386263.3406907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/2011.01148","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Zahra Ebrahimi","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Zahra Ebrahimi","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Salim Ullah","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Salim Ullah","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":null,"display_name":"Akash Kumar","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Akash Kumar","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":1.1438,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.78351995,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"151","last_page":"156"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.8532000184059143},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6905999779701233},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6740999817848206},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.39259999990463257},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.3612000048160553},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3167000114917755},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.3107999861240387}],"concepts":[{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.8532000184059143},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7874000072479248},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6905999779701233},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6740999817848206},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5475999712944031},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4440000057220459},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.39259999990463257},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.3612000048160553},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3167000114917755},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.3107999861240387},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3028999865055084},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2858999967575073},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.27090001106262207},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.26669999957084656},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.26669999957084656},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.26269999146461487},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.26260000467300415},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.2621000111103058},{"id":"https://openalex.org/C61483411","wikidata":"https://www.wikidata.org/wiki/Q3124522","display_name":"Data parallelism","level":3,"score":0.2531999945640564}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3386263.3406907","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3386263.3406907","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 on Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:2011.01148","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2011.01148","pdf_url":"https://arxiv.org/pdf/2011.01148","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:2011.01148","is_oa":true,"landing_page_url":"http://arxiv.org/abs/2011.01148","pdf_url":"https://arxiv.org/pdf/2011.01148","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7276696126","display_name":null,"funder_award_id":"380524764","funder_id":"https://openalex.org/F4320320879","funder_display_name":"Deutsche Forschungsgemeinschaft"}],"funders":[{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1937403678","https://openalex.org/W2007339694","https://openalex.org/W2095736453","https://openalex.org/W2097775702","https://openalex.org/W2103522624","https://openalex.org/W2111013824","https://openalex.org/W2133712953","https://openalex.org/W2146014558","https://openalex.org/W2150921485","https://openalex.org/W2404585587","https://openalex.org/W2535375934","https://openalex.org/W2559460803","https://openalex.org/W2613107232","https://openalex.org/W2750384547","https://openalex.org/W2795961274","https://openalex.org/W2798894566","https://openalex.org/W2883256837","https://openalex.org/W2897107698","https://openalex.org/W2903735800","https://openalex.org/W2908842219","https://openalex.org/W2944128062","https://openalex.org/W2945036830","https://openalex.org/W2945727575","https://openalex.org/W4238341497","https://openalex.org/W4239085833","https://openalex.org/W4247198796","https://openalex.org/W4255177036"],"related_works":[],"abstract_inverted_index":{"The":[0,76],"ever-increasing":[1],"quest":[2],"for":[3,44,54,71],"data-level":[4],"parallelism":[5],"and":[6,12,65,83,98,109,113,137,141,162,169],"variable":[7],"precision":[8,85],"in":[9,107,165],"ubiquitous":[10],"multimedia":[11,97],"Deep":[13],"Neural":[14],"Network":[15],"(DNN)":[16],"applications":[17,100],"has":[18,39],"motivated":[19],"the":[20,55,119,124,147],"use":[21],"of":[22,103],"Single":[23],"Instruction,":[24],"Multiple":[25],"Data":[26],"(SIMD)":[27],"architectures.":[28],"To":[29],"alleviate":[30],"energy":[31,140],"as":[32],"their":[33,45],"main":[34],"resource":[35],"constraint,":[36],"approximate":[37,115],"computing":[38],"re-emerged,":[40],"albeit":[41],"mainly":[42],"specialized":[43],"Application-Specific":[46],"Integrated":[47],"Circuit":[48],"(ASIC)":[49],"implementations.":[50],"This":[51],"paper,":[52],"presents":[53],"first":[56],"time,":[57],"an":[58],"SIMD":[59,149,153],"architecture":[60,79,105],"based":[61],"on":[62],"novel":[63],"multiplier":[64,154],"divider":[66,122,129],"with":[67,133],"tunable":[68],"accuracy,":[69],"targeted":[70],"Field-Programmable":[72],"Gate":[73],"Arrays":[74],"(FPGAs).":[75],"proposed":[77,104,120,148],"hybrid":[78],"implements":[80],"Mitchell's":[81],"algorithms":[82],"supports":[84],"variability":[86],"from":[87,95],"8":[88],"to":[89,158],"32":[90],"bits.":[91],"Experimental":[92],"results":[93],"obtained":[94],"Vivado,":[96],"DNN":[99],"indicate":[101],"superiority":[102],"(both":[106],"SISD":[108,121],"SIMD)":[110],"over":[111],"accurate":[112,125,152],"state-of-the-art":[114],"counterparts.":[116],"In":[117],"particular,":[118],"outperforms":[123],"Intellectual":[126],"Property":[127],"(IP)":[128],"provided":[130],"by":[131,155],"Xilinx":[132],"4x":[134],"higher":[135],"speed":[136],"4.6x":[138],"less":[139],"tolerating":[142],"only":[143],"0.8%":[144],"error.":[145],"Moreover,":[146],"multiplier-divider":[150],"supersede":[151],"achieving":[156],"up":[157],"26%,":[159],"45%,":[160],"36%,":[161],"56%":[163],"improvement":[164],"area,":[166],"throughput,":[167],"power,":[168],"energy,":[170],"respectively.":[171]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":2}],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2020-09-11T00:00:00"}