{"id":"https://openalex.org/W3033149649","doi":"https://doi.org/10.1145/3384441.3395985","title":"Exploiting Inter-Processor-Interrupts for Virtual-Time Coordination in Speculative Parallel Discrete Event Simulation","display_name":"Exploiting Inter-Processor-Interrupts for Virtual-Time Coordination in Speculative Parallel Discrete Event Simulation","publication_year":2020,"publication_date":"2020-06-07","ids":{"openalex":"https://openalex.org/W3033149649","doi":"https://doi.org/10.1145/3384441.3395985","mag":"3033149649"},"language":"en","primary_location":{"id":"doi:10.1145/3384441.3395985","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3384441.3395985","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/11573/1421480","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000767571","display_name":"Emiliano Silvestri","orcid":"https://orcid.org/0000-0002-3330-2529"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Emiliano Silvestri","raw_affiliation_strings":["Sapienza, University of Rome, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza, University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002947526","display_name":"Cristian Milia","orcid":null},"institutions":[{"id":"https://openalex.org/I116067653","display_name":"University of Rome Tor Vergata","ror":"https://ror.org/02p77k626","country_code":"IT","type":"education","lineage":["https://openalex.org/I116067653"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Cristian Milia","raw_affiliation_strings":["University of Rome \"Tor Vergata\", Rome, Italy"],"affiliations":[{"raw_affiliation_string":"University of Rome \"Tor Vergata\", Rome, Italy","institution_ids":["https://openalex.org/I116067653"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070045696","display_name":"Romolo Marotta","orcid":"https://orcid.org/0000-0001-7589-9274"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Romolo Marotta","raw_affiliation_strings":["Sapienza, University of Rome, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza, University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062882537","display_name":"Alessandro Pellegrini","orcid":"https://orcid.org/0000-0002-0179-9868"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessandro Pellegrini","raw_affiliation_strings":["Sapienza, University of Rome, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Sapienza, University of Rome, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003036713","display_name":"Francesco Quaglia","orcid":"https://orcid.org/0000-0002-5616-7980"},"institutions":[{"id":"https://openalex.org/I116067653","display_name":"University of Rome Tor Vergata","ror":"https://ror.org/02p77k626","country_code":"IT","type":"education","lineage":["https://openalex.org/I116067653"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Quaglia","raw_affiliation_strings":["University of Rome \"Tor Vergata\", Rome, Italy"],"affiliations":[{"raw_affiliation_string":"University of Rome \"Tor Vergata\", Rome, Italy","institution_ids":["https://openalex.org/I116067653"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5000767571"],"corresponding_institution_ids":["https://openalex.org/I861853513"],"apc_list":null,"apc_paid":null,"fwci":0.5558,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.71011746,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"59"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8527153730392456},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.760948657989502},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5252346992492676},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.5207721590995789},{"id":"https://openalex.org/keywords/discrete-event-simulation","display_name":"Discrete event simulation","score":0.5146173238754272},{"id":"https://openalex.org/keywords/event","display_name":"Event (particle physics)","score":0.5032028555870056},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.49808430671691895},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.48804083466529846},{"id":"https://openalex.org/keywords/context-switch","display_name":"Context switch","score":0.4778572916984558},{"id":"https://openalex.org/keywords/interrupt","display_name":"Interrupt","score":0.4657040238380432},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.43975770473480225},{"id":"https://openalex.org/keywords/virtual-machine","display_name":"Virtual machine","score":0.4301583468914032},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.4296689033508301},{"id":"https://openalex.org/keywords/thrashing","display_name":"Thrashing","score":0.4263076186180115},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.42282742261886597},{"id":"https://openalex.org/keywords/speculative-execution","display_name":"Speculative execution","score":0.4225083589553833},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4056844115257263},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.20083138346672058},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.11264371871948242},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09091156721115112}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8527153730392456},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.760948657989502},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5252346992492676},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.5207721590995789},{"id":"https://openalex.org/C147203929","wikidata":"https://www.wikidata.org/wiki/Q574814","display_name":"Discrete event simulation","level":2,"score":0.5146173238754272},{"id":"https://openalex.org/C2779662365","wikidata":"https://www.wikidata.org/wiki/Q5416694","display_name":"Event (particle physics)","level":2,"score":0.5032028555870056},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.49808430671691895},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.48804083466529846},{"id":"https://openalex.org/C53833338","wikidata":"https://www.wikidata.org/wiki/Q1061424","display_name":"Context switch","level":2,"score":0.4778572916984558},{"id":"https://openalex.org/C41661131","wikidata":"https://www.wikidata.org/wiki/Q220764","display_name":"Interrupt","level":3,"score":0.4657040238380432},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.43975770473480225},{"id":"https://openalex.org/C25344961","wikidata":"https://www.wikidata.org/wiki/Q192726","display_name":"Virtual machine","level":2,"score":0.4301583468914032},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.4296689033508301},{"id":"https://openalex.org/C28362024","wikidata":"https://www.wikidata.org/wiki/Q2067413","display_name":"Thrashing","level":2,"score":0.4263076186180115},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.42282742261886597},{"id":"https://openalex.org/C141331961","wikidata":"https://www.wikidata.org/wiki/Q2164465","display_name":"Speculative execution","level":2,"score":0.4225083589553833},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4056844115257263},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.20083138346672058},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.11264371871948242},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09091156721115112},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1145/3384441.3395985","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3384441.3395985","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1421480","is_oa":true,"landing_page_url":"http://hdl.handle.net/11573/1421480","pdf_url":"http://hdl.handle.net/11573/1421480","source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:art.torvergata.it:2108/315265","is_oa":false,"landing_page_url":"https://hdl.handle.net/2108/315265","pdf_url":null,"source":{"id":"https://openalex.org/S4306400993","display_name":"Cineca Institutional Research Information System (Tor Vergata University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I116067653","host_organization_name":"University of Rome Tor Vergata","host_organization_lineage":["https://openalex.org/I116067653"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:iris.uniroma1.it:11573/1421480","is_oa":true,"landing_page_url":"http://hdl.handle.net/11573/1421480","pdf_url":"http://hdl.handle.net/11573/1421480","source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"score":0.4000000059604645,"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3033149649.pdf","grobid_xml":"https://content.openalex.org/works/W3033149649.grobid-xml"},"referenced_works_count":28,"referenced_works":["https://openalex.org/W84765653","https://openalex.org/W1970049774","https://openalex.org/W1976533090","https://openalex.org/W1999471171","https://openalex.org/W2027842155","https://openalex.org/W2033593488","https://openalex.org/W2041375474","https://openalex.org/W2053132205","https://openalex.org/W2073792478","https://openalex.org/W2076793904","https://openalex.org/W2095480186","https://openalex.org/W2098209239","https://openalex.org/W2100357382","https://openalex.org/W2113365332","https://openalex.org/W2136423702","https://openalex.org/W2153303191","https://openalex.org/W2163773423","https://openalex.org/W2296199700","https://openalex.org/W2296636214","https://openalex.org/W2618211684","https://openalex.org/W2619944023","https://openalex.org/W2664885055","https://openalex.org/W2883613460","https://openalex.org/W2914982603","https://openalex.org/W2963311060","https://openalex.org/W4206466197","https://openalex.org/W4244953977","https://openalex.org/W4255580823"],"related_works":["https://openalex.org/W2033801100","https://openalex.org/W2124112831","https://openalex.org/W10893106","https://openalex.org/W1936132780","https://openalex.org/W2371844484","https://openalex.org/W2765149243","https://openalex.org/W2741344640","https://openalex.org/W2586771600","https://openalex.org/W2905048389","https://openalex.org/W2913814439"],"abstract_inverted_index":{"Reducing":[0],"the":[1,33,54,57,71,88,109,119,123,137,151,159,164,169,175,185,222],"waste":[2],"of":[3,35,41,56,70,74,92,112,122,154,174,207,224],"resource":[4],"usage":[5],"(e.g.,":[6],"CPU-cycles)":[7],"when":[8],"a":[9,22,79,83,93,145],"causality":[10],"error":[11],"occurs":[12],"in":[13,32,87],"speculative":[14,36,186],"parallel":[15],"discrete":[16],"event":[17,85,177],"simulation":[18,94],"(PDES)":[19],"is":[20,51,133,142],"still":[21],"core":[23],"objective.":[24],"In":[25],"this":[26,30],"article,":[27],"we":[28,195],"target":[29],"objective":[31],"context":[34],"PDES":[37,192,203],"run":[38,97],"on":[39,53,168,205],"top":[40,206],"shared-memory":[42,209],"machines.":[43],"We":[44,180],"propose":[45],"an":[46],"Operating":[47],"System":[48],"approach":[49],"that":[50,149],"based":[52],"exploitation":[55],"Inter-Processor-Interrupt":[58],"(IPI)":[59],"facility":[60],"offered":[61],"by":[62,98,200],"off-the-shelf":[63],"hardware":[64,210],"chipsets,":[65],"which":[66,220],"enables":[67],"cross-CPU-core":[68],"control":[69],"execution":[72,110,172],"flow":[73,111],"threads.":[75],"As":[76],"soon":[77],"as":[78],"thread":[80,100,156],"T":[81,106],"produces":[82],"new":[84],"placed":[86],"past":[89],"virtual":[90],"time":[91,173],"object":[95],"currently":[96,124],"another":[99],"T',":[101],"our":[102,182,225],"IPI-based":[103],"support":[104],"allows":[105],"to":[107,117,136],"change":[108],"T'---with":[113],"very":[114],"minimal":[115],"delay---so":[116],"enable":[118],"early":[120],"squash":[121],"processed":[125],"(and":[126],"no":[127],"longer":[128],"consistent)":[129],"event.":[130],"Our":[131],"solution":[132],"fully":[134],"transparent":[135],"application":[138],"level":[139],"code,":[140],"and":[141,194,215],"coupled":[143],"with":[144,213],"lightweight":[146],"heuristic-based":[147],"mechanism":[148],"determines":[150],"actual":[152],"goodness":[153],"killing":[155],"T'":[157],"via":[158],"IPI":[160,165],"(rather":[161],"than":[162],"skipping":[163],"send)":[166],"depending":[167],"expected":[170],"residual":[171],"incorrect":[176],"being":[178],"processed.":[179],"integrated":[181],"proposal":[183],"within":[184],"open-source":[187],"USE":[188],"(Ultimate":[189],"Share":[190],"Everything)":[191],"package,":[193],"report":[196],"experimental":[197],"results":[198],"obtained":[199],"running":[201],"various":[202],"models":[204],"two":[208],"architectures":[211],"equipped":[212],"32":[214],"24":[216],"(48":[217],"Hyper-threads)":[218],"CPU-cores,":[219],"demonstrate":[221],"effectiveness":[223],"proposal.":[226]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
