{"id":"https://openalex.org/W3007848645","doi":"https://doi.org/10.1145/3373087.3375384","title":"FTDL: An FPGA-tailored Architecture for Deep Learning Systems","display_name":"FTDL: An FPGA-tailored Architecture for Deep Learning Systems","publication_year":2020,"publication_date":"2020-02-23","ids":{"openalex":"https://openalex.org/W3007848645","doi":"https://doi.org/10.1145/3373087.3375384","mag":"3007848645"},"language":"en","primary_location":{"id":"doi:10.1145/3373087.3375384","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3373087.3375384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027887058","display_name":"Runbin Shi","orcid":"https://orcid.org/0000-0003-4901-5476"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]},{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["CN","HK"],"is_corresponding":true,"raw_author_name":"Runbin Shi","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, Hong Kong"],"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633","https://openalex.org/I889458895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114500402","display_name":"Yuhao Ding","orcid":"https://orcid.org/0009-0009-4819-9251"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]},{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["CN","HK"],"is_corresponding":false,"raw_author_name":"Yuhao Ding","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, Hong Kong"],"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633","https://openalex.org/I889458895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102904614","display_name":"Xuechao Wei","orcid":"https://orcid.org/0000-0002-0996-2260"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xuechao Wei","raw_affiliation_strings":["Peking University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Peking University, Beijing, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100338967","display_name":"Hang Liu","orcid":"https://orcid.org/0000-0002-5246-8399"},"institutions":[{"id":"https://openalex.org/I108468826","display_name":"Stevens Institute of Technology","ror":"https://ror.org/02z43xh36","country_code":"US","type":"education","lineage":["https://openalex.org/I108468826"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hang Liu","raw_affiliation_strings":["Stevens Institute of Technology, Hoboken, NJ, USA"],"affiliations":[{"raw_affiliation_string":"Stevens Institute of Technology, Hoboken, NJ, USA","institution_ids":["https://openalex.org/I108468826"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020581824","display_name":"Hayden Kwok\u2010Hay So","orcid":"https://orcid.org/0000-0002-6514-0237"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633"]},{"id":"https://openalex.org/I889458895","display_name":"University of Hong Kong","ror":"https://ror.org/02zhqgq86","country_code":"HK","type":"education","lineage":["https://openalex.org/I889458895"]}],"countries":["CN","HK"],"is_corresponding":false,"raw_author_name":"Hayden So","raw_affiliation_strings":["The University of Hong Kong, Hong Kong, Hong Kong"],"affiliations":[{"raw_affiliation_string":"The University of Hong Kong, Hong Kong, Hong Kong","institution_ids":["https://openalex.org/I177725633","https://openalex.org/I889458895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030060072","display_name":"Caiwen Ding","orcid":"https://orcid.org/0000-0003-0891-1231"},"institutions":[{"id":"https://openalex.org/I140172145","display_name":"University of Connecticut","ror":"https://ror.org/02der9h97","country_code":"US","type":"education","lineage":["https://openalex.org/I140172145"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Caiwen Ding","raw_affiliation_strings":["University of Connecticut, Mansfield, CT, USA"],"affiliations":[{"raw_affiliation_string":"University of Connecticut, Mansfield, CT, USA","institution_ids":["https://openalex.org/I140172145"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5027887058"],"corresponding_institution_ids":["https://openalex.org/I177725633","https://openalex.org/I889458895"],"apc_list":null,"apc_paid":null,"fwci":1.1552,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7529036,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"320","last_page":"320"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.814559817314148},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7662991285324097},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7090516090393066},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6181111335754395},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5493764281272888},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5243057012557983},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5064924955368042},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4948551058769226},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.48976826667785645},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.4660429060459137},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.4644472897052765},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.4533081650733948},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4510969817638397},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.44655317068099976},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3399299085140228},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11789095401763916},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08961176872253418}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.814559817314148},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7662991285324097},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7090516090393066},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6181111335754395},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5493764281272888},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5243057012557983},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5064924955368042},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4948551058769226},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.48976826667785645},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.4660429060459137},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.4644472897052765},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.4533081650733948},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4510969817638397},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.44655317068099976},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3399299085140228},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11789095401763916},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08961176872253418},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3373087.3375384","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3373087.3375384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8700000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2000785801","https://openalex.org/W986318368","https://openalex.org/W2384410913","https://openalex.org/W2352878646","https://openalex.org/W2004734601","https://openalex.org/W2130149817","https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2518118925","https://openalex.org/W3159273459"],"abstract_inverted_index":{"Hardware":[0],"acceleration":[1],"of":[2,102,119],"deep":[3,148],"learning":[4,149],"(DL)":[5],"systems":[6],"has":[7,91],"been":[8],"increasingly":[9],"studied":[10],"to":[11,57,86,110,142,161,166],"achieve":[12,111],"desirable":[13],"performance":[14],"and":[15,27,31,53,60,80,107,127],"energy":[16,25],"efficiency.":[17,190],"The":[18],"FPGA":[19,88],"strikes":[20],"a":[21,37,78,112,157],"balance":[22],"between":[23],"high":[24],"efficiency":[26],"fast":[28],"development":[29],"cycle":[30],"therefore":[32],"is":[33,84,125,134,140],"widely":[34],"used":[35],"as":[36],"DNN":[38],"accelerator.":[39],"However,":[40],"there":[41],"exists":[42],"an":[43,74,171,186],"architecture-layout":[44],"mismatch":[45],"in":[46,68,170,182],"the":[47,92,97,132,138,163,167],"current":[48],"designs,":[49],"which":[50],"introduces":[51],"scalability":[52],"flexibility":[54],"issues,":[55],"leading":[56],"irregular":[58],"routing":[59],"resource":[61,144],"imbalance":[62],"problems.":[63],"To":[64],"address":[65],"these":[66],"limitations,":[67],"this":[69],"work,":[70],"we":[71],"propose":[72],"FTDL,":[73],"FPGA-tailored":[75],"architecture":[76,98,168],"with":[77],"parameterized":[79],"hierarchical":[81],"hardware":[82,189],"that":[83,159,177],"adaptive":[85],"different":[87,147],"devices.":[89],"FTDL":[90,100,124,155,184],"following":[93],"novelties:":[94],"(i)":[95],"At":[96],"level,":[99],"consists":[101],"Tiled":[103],"Processing":[104],"Elements":[105],"(TPE)":[106],"super":[108],"blocks,":[109],"near-to-theoretical":[113],"digital":[114],"signal":[115],"processing":[116],"(DSP)":[117],"operating-frequency":[118],"650":[120],"MHz.":[121],"More":[122],"importantly,":[123],"configurable":[126],"delivers":[128],"good":[129],"scalability,":[130],"i.e.,":[131],"timing":[133],"stabilized":[135],"even":[136],"when":[137],"design":[139],"scaled-up":[141],"100%":[143],"utilization":[145],"for":[146,178],"systems.":[150],"(ii)":[151],"In":[152],"workload":[153],"compilation,":[154],"provides":[156],"compiler":[158],"manages":[160],"map":[162],"DL":[164],"workloads":[165],"level":[169],"optimal":[172],"manner.":[173],"Experimental":[174],"results":[175],"show":[176],"most":[179],"benchmark":[180],"layers":[181],"MLPerf,":[183],"achieves":[185],"over":[187],"80%":[188]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}