{"id":"https://openalex.org/W3012060364","doi":"https://doi.org/10.1145/3372780.3378172","title":"Learning from Experience","display_name":"Learning from Experience","publication_year":2020,"publication_date":"2020-03-20","ids":{"openalex":"https://openalex.org/W3012060364","doi":"https://doi.org/10.1145/3372780.3378172","mag":"3012060364"},"language":"en","primary_location":{"id":"doi:10.1145/3372780.3378172","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3372780.3378172","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 International Symposium on Physical Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063963932","display_name":"Kishor Kunal","orcid":"https://orcid.org/0000-0003-3510-9850"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kishor Kunal","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006995274","display_name":"Tonmoy Dhar","orcid":"https://orcid.org/0000-0003-0980-9749"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tonmoy Dhar","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101587350","display_name":"Yaguang Li","orcid":"https://orcid.org/0000-0001-9425-034X"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yaguang Li","raw_affiliation_strings":["Texas A&amp;M University, College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Texas A&amp;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063857392","display_name":"Meghna Madhusudan","orcid":"https://orcid.org/0000-0001-5101-2421"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Meghna Madhusudan","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004779677","display_name":"Jitesh Poojary","orcid":"https://orcid.org/0000-0001-7548-9064"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jitesh Poojary","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100732194","display_name":"Arvind Sharma","orcid":"https://orcid.org/0000-0002-9250-9642"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arvind K. Sharma","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055673445","display_name":"Wenbin Xu","orcid":"https://orcid.org/0000-0001-5165-8556"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wenbin Xu","raw_affiliation_strings":["Texas A&amp;M University, College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Texas A&amp;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053468539","display_name":"Steven M. Burns","orcid":"https://orcid.org/0000-0003-0248-5403"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven M. Burns","raw_affiliation_strings":["Intel Labs, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059037025","display_name":"Ramesh Harjani","orcid":"https://orcid.org/0000-0001-7691-566X"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Harjani","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103246390","display_name":"Jiang Hu","orcid":"https://orcid.org/0000-0003-1157-7799"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiang Hu","raw_affiliation_strings":["Texas A&amp;M University, College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Texas A&amp;M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028130545","display_name":"Parijat Mukherjee","orcid":"https://orcid.org/0000-0002-2532-7347"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Parijat Mukherjee","raw_affiliation_strings":["Intel Labs, Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Labs, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["University of Minnesota, Minneapolis, MN, USA"],"affiliations":[{"raw_affiliation_string":"University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":12,"corresponding_author_ids":["https://openalex.org/A5063963932"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.1027,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.39698899,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"55","last_page":"55"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.9793835878372192},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7109772562980652},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.6799231767654419},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.6433835625648499},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5278422832489014},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5257911682128906},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.49367555975914},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.480044960975647},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4641861319541931},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.46347200870513916},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37531578540802},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.34671950340270996},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.34199851751327515},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33161818981170654},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23142790794372559},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20719072222709656},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.19793757796287537},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.14288190007209778}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.9793835878372192},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7109772562980652},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.6799231767654419},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.6433835625648499},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5278422832489014},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5257911682128906},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.49367555975914},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.480044960975647},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4641861319541931},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.46347200870513916},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37531578540802},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.34671950340270996},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.34199851751327515},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33161818981170654},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23142790794372559},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20719072222709656},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.19793757796287537},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.14288190007209778},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3372780.3378172","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3372780.3378172","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2020 International Symposium on Physical Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2945221971","https://openalex.org/W3036312847"],"related_works":["https://openalex.org/W2253391080","https://openalex.org/W2365383750","https://openalex.org/W1590828620","https://openalex.org/W2147968839","https://openalex.org/W144590410","https://openalex.org/W2100447044","https://openalex.org/W2113225350","https://openalex.org/W1435266366","https://openalex.org/W1156564840","https://openalex.org/W4255521166"],"abstract_inverted_index":{"The":[0,43,70],"problem":[1,23,205],"of":[2,10,21,39,81,103,105,113,115,135,151,177,202],"analog":[3,162],"design":[4,14,163],"automation":[5,164],"has":[6],"vexed":[7],"several":[8],"generations":[9],"researchers":[11],"in":[12,68,75,122],"electronic":[13],"automation.":[15],"At":[16],"its":[17],"core,":[18],"the":[19,22,27,37,40,100,111,123,149],"difficulty":[20],"is":[24,65,84,92,157],"related":[25],"to":[26,35,57,72,86,99,161,166,170,208],"fact":[28],"that":[29,64],"machinegenerated":[30],"designs":[31],"have":[32,196,206],"been":[33],"unable":[34],"match":[36],"quality":[38],"human":[41,44],"designer.":[42],"designer":[45,126],"typically":[46],"recognizes":[47],"blocks":[48,60,74],"from":[49],"a":[50,62,76,82,93,187],"netlist":[51],"and":[52],"draws":[53],"upon":[54],"her/his":[55],"experience":[56],"translate":[58],"these":[59,172],"into":[61,137],"circuit":[63,83,107],"laid":[66],"out":[67],"silicon.":[69],"ability":[71],"annotate":[73],"schematic":[77],"or":[78],"netlist-level":[79],"description":[80],"key":[85],"this":[87,128,132,175,204],"entire":[88],"process,":[89],"but":[90,174],"it":[91],"process":[94],"fraught":[95],"with":[96],"complexity":[97,129],"due":[98],"large":[101,133],"number":[102,112,150],"variants":[104,136],"each":[106,155,182],"type.":[108],"For":[109],"example,":[110],"topologies":[114],"operational":[116],"transconductance":[117],"amplifiers":[118],"(OTAs)":[119],"easily":[120],"numbers":[121],"hundreds.":[124],"A":[125],"manages":[127],"by":[130],"dividing":[131],"set":[134],"classes":[138],"(e.g.,":[139],"OTAs":[140],"may":[141],"be":[142,209],"telescopic,":[143],"folded":[144],"cascode,":[145],"etc.).":[146],"Even":[147],"so,":[148],"minor":[152],"variations":[153],"within":[154],"class":[156],"large.":[158],"Early":[159],"approaches":[160],"attempted":[165],"use":[167],"rule-based":[168],"methods":[169],"capture":[171],"variations,":[173],"database":[176],"rules":[178],"required":[179],"tender":[180],"care:":[181],"new":[183,188],"variant":[184],"might":[185],"require":[186],"rule.":[189],"As":[190],"machine":[191],"learning":[192],"(ML)":[193],"based":[194],"alternatives":[195],"become":[197],"more":[198],"viable,":[199],"alternative":[200],"forms":[201],"solving":[203],"begun":[207],"explored.":[210]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
