{"id":"https://openalex.org/W2984287963","doi":"https://doi.org/10.1145/3362100","title":"REAL","display_name":"REAL","publication_year":2019,"publication_date":"2019-11-15","ids":{"openalex":"https://openalex.org/W2984287963","doi":"https://doi.org/10.1145/3362100","mag":"2984287963"},"language":"en","primary_location":{"id":"doi:10.1145/3362100","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3362100","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101814901","display_name":"Sakshi Tiwari","orcid":"https://orcid.org/0000-0002-0827-2882"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sakshi Tiwari","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":"https://orcid.org/0000-0002-0827-2882","affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024179661","display_name":"Shreshth Tuli","orcid":"https://orcid.org/0000-0003-2960-1128"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shreshth Tuli","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068230649","display_name":"Isaar Ahmad","orcid":"https://orcid.org/0009-0008-3603-6925"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Isaar Ahmad","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101819839","display_name":"Ayushi Agarwal","orcid":"https://orcid.org/0009-0003-2318-5108"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ayushi Agarwal","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027215692","display_name":"Preeti Ranjan Panda","orcid":"https://orcid.org/0000-0002-2508-7531"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Preeti Ranjan Panda","raw_affiliation_strings":["Indian Institute of Technology Delhi, New Delhi, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Delhi, New Delhi, India","institution_ids":["https://openalex.org/I68891433"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036799188","display_name":"Sreenivas Subramoney","orcid":"https://orcid.org/0000-0001-5372-0173"},"institutions":[{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sreenivas Subramoney","raw_affiliation_strings":["Microarchitecture Research Lab, Intel, Bengaluru, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microarchitecture Research Lab, Intel, Bengaluru, India","institution_ids":["https://openalex.org/I4210146682"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2468,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.52494302,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"18","issue":"6","first_page":"1","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8176420331001282},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.8062045574188232},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6604572534561157},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6068839430809021},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6049952507019043},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5990882515907288},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5113832354545593},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.47706758975982666},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.4562370479106903},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.4384543299674988},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3832731246948242},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.21410003304481506}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8176420331001282},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.8062045574188232},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6604572534561157},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6068839430809021},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6049952507019043},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5990882515907288},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5113832354545593},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.47706758975982666},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.4562370479106903},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.4384543299674988},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3832731246948242},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.21410003304481506}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3362100","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3362100","pdf_url":null,"source":{"id":"https://openalex.org/S136160450","display_name":"ACM Transactions on Embedded Computing Systems","issn_l":"1539-9087","issn":["1539-9087","1558-3465"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319798","host_organization_name":"Association for Computing Machinery","host_organization_lineage":["https://openalex.org/P4310319798"],"host_organization_lineage_names":["Association for Computing Machinery"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ACM Transactions on Embedded Computing Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[{"id":"https://openalex.org/G8289386430","display_name":null,"funder_award_id":"2017-SD-2738","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1515851193","https://openalex.org/W1604530876","https://openalex.org/W2018404774","https://openalex.org/W2048589567","https://openalex.org/W2079133422","https://openalex.org/W2100787464","https://openalex.org/W2147657366","https://openalex.org/W2154512574","https://openalex.org/W2157134596","https://openalex.org/W2159908132","https://openalex.org/W2162838417","https://openalex.org/W2234128234","https://openalex.org/W2267268515","https://openalex.org/W2345722469","https://openalex.org/W2394805807","https://openalex.org/W2725159389","https://openalex.org/W2739197700","https://openalex.org/W2798495354","https://openalex.org/W2799071491","https://openalex.org/W2805359884","https://openalex.org/W2998091606","https://openalex.org/W3009835773","https://openalex.org/W3013523828","https://openalex.org/W4210945039","https://openalex.org/W4232168013","https://openalex.org/W4245363142"],"related_works":["https://openalex.org/W2114386333","https://openalex.org/W2363769136","https://openalex.org/W2031173804","https://openalex.org/W2734782074","https://openalex.org/W4307138321","https://openalex.org/W2012518269","https://openalex.org/W2109715593","https://openalex.org/W2146079099","https://openalex.org/W4213009904","https://openalex.org/W4234542536"],"abstract_inverted_index":{"Shared":[0],"last":[1],"level":[2],"caches":[3],"(LLC)":[4],"of":[5,14,51,64,88,133],"multicore":[6],"systems-on-chip":[7],"are":[8],"subject":[9],"to":[10,84,119,125,137],"a":[11,17,29,93,122],"significant":[12],"amount":[13],"contention":[15,66],"over":[16,142],"limited":[18],"bandwidth,":[19],"resulting":[20,69],"in":[21,32,46],"major":[22],"performance":[23],"bottlenecks":[24],"that":[25,102],"make":[26],"the":[27,47,49,62,68,72,78,86,115],"issue":[28],"first-order":[30],"concern":[31],"modern":[33],"multiprocessor":[34],"systems-on-chip.":[35],"Even":[36],"though":[37],"shared":[38],"cache":[39,52,95,105],"space":[40],"partitioning":[41,54,97],"has":[42,55],"been":[43],"extensively":[44],"studied":[45],"past,":[48],"problem":[50],"bandwidth":[53,96],"not":[56],"received":[57],"sufficient":[58],"attention.":[59],"We":[60],"demonstrate":[61],"occurrence":[63],"such":[65],"and":[67,91],"impact":[70,87,147],"on":[71,130,148],"overall":[73,139],"system":[74,140],"performance.":[75],"To":[76],"address":[77],"issue,":[79],"we":[80],"perform":[81],"detailed":[82],"simulations":[83],"study":[85],"different":[89,110,131],"parameters":[90],"propose":[92],"novel":[94],"technique,":[98],"called":[99],"REAL":[100],",":[101],"arbitrates":[103],"among":[104],"access":[106,117],"requests":[107],"originating":[108],"from":[109],"processor":[111],"cores.":[112],"It":[113],"monitors":[114],"LLC":[116],"patterns":[118],"dynamically":[120],"assign":[121],"priority":[123],"value":[124],"each":[126],"core.":[127],"Experimental":[128],"results":[129],"mixes":[132],"benchmarks":[134],"show":[135],"up":[136],"2.13\u00d7":[138],"speedup":[141],"baseline":[143],"policies,":[144],"with":[145],"minimal":[146],"energy.":[149]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2019-11-22T00:00:00"}
