{"id":"https://openalex.org/W2975682717","doi":"https://doi.org/10.1145/3349801.3357129","title":"A survey on FPGA-based high-resolution TDCs","display_name":"A survey on FPGA-based high-resolution TDCs","publication_year":2019,"publication_date":"2019-09-09","ids":{"openalex":"https://openalex.org/W2975682717","doi":"https://doi.org/10.1145/3349801.3357129","mag":"2975682717"},"language":"en","primary_location":{"id":"doi:10.1145/3349801.3357129","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3349801.3357129","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 13th International Conference on Distributed Smart Cameras","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084269570","display_name":"Mojtaba Parsakordasiabi","orcid":"https://orcid.org/0000-0002-4760-3437"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Mojtaba Parsakordasiabi","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016193387","display_name":"Ion Vornicu","orcid":"https://orcid.org/0000-0001-6865-5116"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ion Vornicu","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067253647","display_name":"Ricardo Carmona\u2010Gal\u00e1n","orcid":"https://orcid.org/0000-0002-4230-3988"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ricardo Carmona-Gal\u00e1n","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029359976","display_name":"\u00c1. Rodr\u00edguez\u2010V\u00e1zquez","orcid":"https://orcid.org/0000-0002-1006-5241"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"\u00c1ngel Rodr\u00edguez-V\u00e1zquez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla (IMSE-CNM), CSIC-Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1944,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.75211818,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9915000200271606,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8149673938751221},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6413528323173523},{"id":"https://openalex.org/keywords/resolution","display_name":"Resolution (logic)","score":0.5164015889167786},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3515186607837677},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34752264618873596},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.16823777556419373}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8149673938751221},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6413528323173523},{"id":"https://openalex.org/C138268822","wikidata":"https://www.wikidata.org/wiki/Q1051925","display_name":"Resolution (logic)","level":2,"score":0.5164015889167786},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3515186607837677},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34752264618873596},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.16823777556419373}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3349801.3357129","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3349801.3357129","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 13th International Conference on Distributed Smart Cameras","raw_type":"proceedings-article"},{"id":"pmh:oai:digital.csic.es:10261/194354","is_oa":false,"landing_page_url":"http://hdl.handle.net/10261/194354","pdf_url":null,"source":{"id":"https://openalex.org/S4306400616","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"actas de congreso"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G1992696483","display_name":null,"funder_award_id":"765866","funder_id":"https://openalex.org/F4320332999","funder_display_name":"Horizon 2020 Framework Programme"},{"id":"https://openalex.org/G2628364946","display_name":null,"funder_award_id":"H2020","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G495187929","display_name":null,"funder_award_id":"EU\u2010H2020","funder_id":"https://openalex.org/F4320332999","funder_display_name":"Horizon 2020 Framework Programme"},{"id":"https://openalex.org/G6298273575","display_name":null,"funder_award_id":"RTI2018","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G655916529","display_name":null,"funder_award_id":"N00014-19-1-2156","funder_id":"https://openalex.org/F4320337345","funder_display_name":"Office of Naval Research"},{"id":"https://openalex.org/G7854962747","display_name":null,"funder_award_id":"RTI2018-097088-B-C31","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G8876996369","display_name":null,"funder_award_id":"N00014","funder_id":"https://openalex.org/F4320337345","funder_display_name":"Office of Naval Research"}],"funders":[{"id":"https://openalex.org/F4320332999","display_name":"Horizon 2020 Framework Programme","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320337345","display_name":"Office of Naval Research","ror":"https://ror.org/00rk2pe57"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1970217326","https://openalex.org/W2056848692","https://openalex.org/W2072602654","https://openalex.org/W2083238829","https://openalex.org/W2138616926","https://openalex.org/W2147196983","https://openalex.org/W2333526015","https://openalex.org/W2605672202","https://openalex.org/W2782821369","https://openalex.org/W2790282971"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2111241003","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160474882"],"abstract_inverted_index":{"Time-to-digital":[0],"converters":[1],"based":[2],"on":[3],"Nutt":[4],"method":[5],"are":[6,13],"especially":[7],"suitable":[8],"for":[9,36,43,49],"FPGA":[10],"implementation.":[11],"They":[12],"able":[14],"to":[15],"provide":[16],"high":[17,44,50],"resolution,":[18],"range":[19],"and":[20,46,58],"linearity":[21],"with":[22],"low":[23],"resources":[24],"usage.":[25],"The":[26],"core":[27],"of":[28,65],"this":[29],"architecture":[30],"consist":[31],"in":[32],"a":[33,39,63],"coarse":[34],"counter":[35],"long":[37],"range,":[38],"fine":[40],"time":[41,56],"interpolator":[42],"resolution":[45],"real-time":[47,59],"calibration":[48,60],"linearity.":[51],"This":[52],"paper":[53],"reviews":[54],"different":[55],"interpolation":[57],"techniques.":[61],"Moreover,":[62],"comparison":[64],"state-of-the-art":[66],"FPGA-based":[67],"TDCs":[68],"is":[69],"presented":[70],"as":[71],"well.":[72]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":3}],"updated_date":"2026-08-01T09:00:35.917206","created_date":"2025-10-10T00:00:00"}
