{"id":"https://openalex.org/W2990791043","doi":"https://doi.org/10.1145/3349567.3351715","title":"A concept of a hardware design environment with the functional language elixir","display_name":"A concept of a hardware design environment with the functional language elixir","publication_year":2019,"publication_date":"2019-10-13","ids":{"openalex":"https://openalex.org/W2990791043","doi":"https://doi.org/10.1145/3349567.3351715","mag":"2990791043"},"language":"en","primary_location":{"id":"doi:10.1145/3349567.3351715","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3349567.3351715","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031424624","display_name":"Hideki Takase","orcid":"https://orcid.org/0000-0002-2660-5927"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Hideki Takase","raw_affiliation_strings":["Kyoto University, Sakyo-ku, Kyoto, Japan"],"affiliations":[{"raw_affiliation_string":"Kyoto University, Sakyo-ku, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030446932","display_name":"Kentaro Matsui","orcid":"https://orcid.org/0000-0003-4538-5381"},"institutions":[{"id":"https://openalex.org/I22299242","display_name":"Kyoto University","ror":"https://ror.org/02kpeqv85","country_code":"JP","type":"education","lineage":["https://openalex.org/I22299242"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kentaro Matsui","raw_affiliation_strings":["Kyoto University, Sakyo-ku, Kyoto, Japan"],"affiliations":[{"raw_affiliation_string":"Kyoto University, Sakyo-ku, Kyoto, Japan","institution_ids":["https://openalex.org/I22299242"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048525593","display_name":"Yoshihiro Ueno","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Yoshihiro Ueno","raw_affiliation_strings":["Delight Systems, Co., Ltd., Chuo-ku, Fukuoka, Japan"],"affiliations":[{"raw_affiliation_string":"Delight Systems, Co., Ltd., Chuo-ku, Fukuoka, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110971308","display_name":"Masakazu Mori","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Masakazu Mori","raw_affiliation_strings":["Karabiner Technology, Inc., Chuo-ku, Fukuoka, Japan"],"affiliations":[{"raw_affiliation_string":"Karabiner Technology, Inc., Chuo-ku, Fukuoka, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026371112","display_name":"Yuki Hisae","orcid":null},"institutions":[{"id":"https://openalex.org/I17056963","display_name":"The University of Kitakyushu","ror":"https://ror.org/03mfefw72","country_code":"JP","type":"education","lineage":["https://openalex.org/I17056963"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yuki Hisae","raw_affiliation_strings":["The University of Kitakyushu, Wakamatsu-ku, Kitakushu, Japan"],"affiliations":[{"raw_affiliation_string":"The University of Kitakyushu, Wakamatsu-ku, Kitakushu, Japan","institution_ids":["https://openalex.org/I17056963"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043681033","display_name":"Susumu Yamazaki","orcid":"https://orcid.org/0000-0003-2327-9297"},"institutions":[{"id":"https://openalex.org/I17056963","display_name":"The University of Kitakyushu","ror":"https://ror.org/03mfefw72","country_code":"JP","type":"education","lineage":["https://openalex.org/I17056963"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Susumu Yamazaki","raw_affiliation_strings":["The University of Kitakyushu, Wakamatsu-ku, Kitakushu, Japan"],"affiliations":[{"raw_affiliation_string":"The University of Kitakyushu, Wakamatsu-ku, Kitakushu, Japan","institution_ids":["https://openalex.org/I17056963"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5031424624"],"corresponding_institution_ids":["https://openalex.org/I22299242"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16031829,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/elixir","display_name":"Elixir (programming language)","score":0.8766875267028809},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7545620799064636},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6729557514190674},{"id":"https://openalex.org/keywords/functional-programming","display_name":"Functional programming","score":0.5728870630264282},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5417805910110474},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5377082824707031},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4831251800060272},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4559084475040436},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.4285944402217865},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3757176399230957},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37567001581192017},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.141823410987854}],"concepts":[{"id":"https://openalex.org/C103472402","wikidata":"https://www.wikidata.org/wiki/Q5362035","display_name":"Elixir (programming language)","level":2,"score":0.8766875267028809},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7545620799064636},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6729557514190674},{"id":"https://openalex.org/C42383842","wikidata":"https://www.wikidata.org/wiki/Q193076","display_name":"Functional programming","level":2,"score":0.5728870630264282},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5417805910110474},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5377082824707031},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4831251800060272},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4559084475040436},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.4285944402217865},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3757176399230957},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37567001581192017},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.141823410987854}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1145/3349567.3351715","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3349567.3351715","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis Companion","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W347636100","https://openalex.org/W1983394510","https://openalex.org/W2160323811","https://openalex.org/W2173213060"],"related_works":["https://openalex.org/W2148669305","https://openalex.org/W1988777083","https://openalex.org/W4234259058","https://openalex.org/W1854591799","https://openalex.org/W2159749022","https://openalex.org/W1967519200","https://openalex.org/W4256228931","https://openalex.org/W1591887209","https://openalex.org/W4234461763","https://openalex.org/W2166112445"],"abstract_inverted_index":{"The":[0],"functional":[1,74],"language":[2],"Elixir":[3,19,49,69],"is":[4,20,23,102],"designed":[5],"to":[6,25],"be":[7],"effective":[8],"for":[9,45,59,89],"the":[10,14,27,31,64,67,78,106,112,116,119],"application.":[11],"One":[12],"of":[13,18,80,95,115,136],"most":[15],"considerable":[16],"feature":[17],"that":[21],"it":[22],"easy":[24],"realize":[26,124],"parallel":[28,93],"processing":[29,94,113,121],"with":[30],"standard":[32],"library,":[33],"such":[34],"as":[35,50],"Flow.":[36],"In":[37],"this":[38,131],"paper,":[39],"we":[40],"study":[41],"a":[42,51,56,125],"design":[43,52,127],"environment":[44,128],"hardware":[46,62,126],"circuits":[47,76],"using":[48],"language.":[53],"We":[54],"propose":[55],"synthesize":[57],"flow":[58,61,101],"data":[60,96,120],"on":[63,105],"FPGA":[65],"from":[66,77],"native":[68],"code.":[70],"Our":[71],"method":[72],"synthesizes":[73],"equivalence":[75],"description":[79],"Enum":[81],"and":[82,92],"Flow":[83],"in":[84,98],"Elixir,":[85,130],"which":[86,110],"are":[87],"libraries":[88],"direct":[90],"manipulation":[91],"collection":[97],"Elixir.":[99],"Data":[100],"implemented":[103],"base":[104],"pipeline":[107],"operator":[108],"|>":[109],"connects":[111],"relation":[114],"function":[117],"by":[118,129],"order.":[122],"To":[123],"paper":[132],"shares":[133],"current":[134],"status":[135],"our":[137],"implementation.":[138]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
