{"id":"https://openalex.org/W2947508157","doi":"https://doi.org/10.1145/3315573.3329979","title":"Massively parallel GPU memory compaction","display_name":"Massively parallel GPU memory compaction","publication_year":2019,"publication_date":"2019-06-07","ids":{"openalex":"https://openalex.org/W2947508157","doi":"https://doi.org/10.1145/3315573.3329979","mag":"2947508157"},"language":"en","primary_location":{"id":"doi:10.1145/3315573.3329979","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3315573.3329979","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM SIGPLAN International Symposium on Memory Management","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023094588","display_name":"Matthias Springer","orcid":"https://orcid.org/0000-0001-5077-7131"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Matthias Springer","raw_affiliation_strings":["Tokyo Institute of Technology, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Japan","institution_ids":["https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079977725","display_name":"Hidehiko Masuhara","orcid":"https://orcid.org/0000-0002-8837-5303"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hidehiko Masuhara","raw_affiliation_strings":["Tokyo Institute of Technology, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Tokyo Institute of Technology, Japan","institution_ids":["https://openalex.org/I114531698"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2468,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.48088124,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"14","last_page":"26"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7752593755722046},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7122663855552673},{"id":"https://openalex.org/keywords/allocator","display_name":"Allocator","score":0.6125364899635315},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.5436827540397644},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.529791533946991},{"id":"https://openalex.org/keywords/fragmentation","display_name":"Fragmentation (computing)","score":0.5123894810676575},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4683014452457428},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.43478959798812866},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.18601319193840027},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1428232491016388}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7752593755722046},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7122663855552673},{"id":"https://openalex.org/C162262903","wikidata":"https://www.wikidata.org/wiki/Q343527","display_name":"Allocator","level":2,"score":0.6125364899635315},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.5436827540397644},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.529791533946991},{"id":"https://openalex.org/C191015642","wikidata":"https://www.wikidata.org/wiki/Q1132459","display_name":"Fragmentation (computing)","level":2,"score":0.5123894810676575},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4683014452457428},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.43478959798812866},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.18601319193840027},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1428232491016388}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1145/3315573.3329979","is_oa":false,"landing_page_url":"https://doi.org/10.1145/3315573.3329979","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2019 ACM SIGPLAN International Symposium on Memory Management","raw_type":"proceedings-article"},{"id":"pmh:oai:irdb.nii.ac.jp:00897:0004592225","is_oa":false,"landing_page_url":"http://t2r2.star.titech.ac.jp/cgi-bin/publicationinfo.cgi?q_publication_content_number=CTT100802981","pdf_url":null,"source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6291121314","display_name":null,"funder_award_id":"18J14726","funder_id":"https://openalex.org/F4320320212","funder_display_name":"Japan Society for the Promotion of Science London"}],"funders":[{"id":"https://openalex.org/F4320309480","display_name":"Nvidia","ror":"https://ror.org/03jdj4y14"},{"id":"https://openalex.org/F4320320212","display_name":"Japan Society for the Promotion of Science London","ror":"https://ror.org/02m7axw05"},{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W791316411","https://openalex.org/W1746694335","https://openalex.org/W1965245408","https://openalex.org/W1970854199","https://openalex.org/W1978220811","https://openalex.org/W2025674827","https://openalex.org/W2025899651","https://openalex.org/W2039820867","https://openalex.org/W2046839064","https://openalex.org/W2058972142","https://openalex.org/W2067635581","https://openalex.org/W2120457453","https://openalex.org/W2147193503","https://openalex.org/W2156225894","https://openalex.org/W2534888058","https://openalex.org/W2626696598","https://openalex.org/W2739306482","https://openalex.org/W2763388378","https://openalex.org/W2911544077","https://openalex.org/W4237292652","https://openalex.org/W4255234786"],"related_works":["https://openalex.org/W2167303720","https://openalex.org/W2497617944","https://openalex.org/W1563139915","https://openalex.org/W4379518600","https://openalex.org/W2109715593","https://openalex.org/W2061075966","https://openalex.org/W3147501184","https://openalex.org/W2268996566","https://openalex.org/W4256652509","https://openalex.org/W2140219379"],"abstract_inverted_index":{"Memory":[0],"fragmentation":[1,16],"is":[2,12],"a":[3],"widely":[4],"studied":[5],"problem":[6],"of":[7],"dynamic":[8],"memory":[9],"allocators.":[10],"It":[11],"well":[13],"known":[14],"that":[15],"can":[17],"lead":[18],"to":[19],"premature":[20],"out-of-memory":[21],"errors":[22],"and":[23],"poor":[24],"cache":[25],"performance.":[26]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}